The MIPI® D-PHY is compliant to the MIPI D-PHY Specification v2.1.
- MIPI D-PHY
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
The MIPI® D-PHY is compliant to the MIPI D-PHY Specification v2.1.
MIPI D-PHY Analog Transceiver IP Core
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI®) Alliance was created to d…
Combination MIPI CPHY-DPHY Analog Interface
The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
MIPI CPHY v1.1 Analog Interface
The MIPI CPHY V1.1 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
The LLI Controller connects two chips together to create a single “virtual chip”, with both chips sharing the same memory.
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to de…
The High Speed Synchronous Serial Interface (HSI) Controller is used to provide high bandwidth, point-to-point, serial communicat…
The DSI Tx Controller IP is designed to provide MIPI DSI 1.3 – compliant high-speed serial connectivity for the host (mobile appl…
The DSI v1.3 Receiver Controller IP is designed to provide MIPI DSI 1.3 compliant high-speed serial connectivity for device (mobi…
MIPI DSI-2 Transmitter Controller IP Core
The MIPI Display Serial Interface (DSI-2) Transmitter (host processor interface) Controller IP provides a high-speed serial inter…
MIPI DSI-2 Receiver IP Controller Core
The MIPI Display Serial Interface (DSI-2) Receiver (display panel interface) Controller IP provides a high-speed serial interface…
Arasan Chip Systems is a SOC IP provider of a suite of MIPI compliant IP solutions, which consist of IP cores, verification IP, s…
The silicon-proven Gigabit Ethernet IP core provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Medi…
Fast Ethernet Media Access Controller
The Fast Ethernet Media Access Controller (FEMAC) with AHB or AXI Interface core incorporates the essential protocol requirements…
The 10/100 Ethernet Media Access Controller (MAC) IP core is compliant with the Ethernet IEEE 802.3-2002 standard and has passed …
The 802.3 Ethernet Device Driver is developed to support both the 10/ 100 Ethernet IP as well as its Gigabit Ethernet IP.
Gigabit Ethernet with IEEE 1588 and AVB
The Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard and supports protocol ext…
10 Gigabit Ethernet MAC IP Core
The 10 Gigabit Ethernet (XGMAC) IP core is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between…
The eMMC5.1 PHY is a fully compliant PHY layer for JEDEC eMMC5.1 and eMMC5.1 JESD84-B50 specification.
This Universal NOR Flash IP supports a variety of NOR Devices and multiple Protocols, combines ease of use with high reliability,…