Vendor: Arasan Chip Systems Inc. Category: Slimbus

MIPI SLIMbus Hardware Validation Platform

The SLIMbus® (Serial Low-power Inter-chip Media bus protocol) Hardware Validation Platform provides the mobile industry a versati…

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Overview

The SLIMbus® (Serial Low-power Inter-chip Media bus protocol) Hardware Validation Platform provides the mobile industry a versatile means to assist in the development and debugging of SLIMbus® products. By emulating a real-world SLIMbus host component, this platform can be used by system and software developers to completely validate the implementation of the SLIMbus interface in their products during various stages of the development cycle.

The SLIMbus Hardware Validation Platform (HVP) includes both the Manager and Framer devices which are active by default. This gives the user the means, through a simple Exerciser application, to configure the SLIMbus sub-system, control and data space, and channel bandwidth allocation within the data space when connecting their products to the HPV. Such configuration can be modified, saved for a future runtime session, and restored in the future, thereby saving time for the user. Bus and frame management duties can be transferred to external components that contain Manager and Framer devices that the user may want to activate.

The SLIMbus HVP’s Exerciser application provides the means to source and sinks audio files across different audio channels mapped onto SLIMbus. This provides validation to the end-user regarding the proper configuration of their SLIMbus-related devices, and proper bandwidth allocation and transfer protocols for control messages and payload data over the shared bus.

Key features

  • Operates as SLIMbus Host component with integrated Active Manager devicev
  • Performs dynamic enumeration of up to 256 devices of the SLIMbus sub-system
  • Manager device can be inactivated
  • Supports SLIMbus clock Gear-up and Gear-down when integrated Framer device active
  • Create, update, save and restore of Control and Data Space configuration
  • Dynamic configuration of message channel
  • Core and user message generation and transmission, including those for SPI
  • Dynamic configuration of up to 256 data/audio channels
  • Dynamic disconnect/deactivate and reconnect/reactivate of each data/audio channel
  • Each audio port configurable for recording or playback
  • Pause/Resume/Repeat of playback from host
  • Simultaneous recording and playback of mono and stereo .wav files across separate sink and source ports

Block Diagram

MIPI SLIMbus Hardware Validation Platform block diagram

Benefits

  • SLIMbus Validation, Integration and Troubleshooting

What’s Included?

  • Arasan HVP Hardware
  • Exercizer Application with Documentation

Specifications

Identity

Part Number
MIPI SLIMbus Hardware Validation Platform
Vendor
Arasan Chip Systems Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Arasan Chip Systems Inc.

Learn more about Slimbus IP core

Vertically Integrated MIPI Solutions

The emerging MIPI standards are designed to ensure interoperability among devices and software that are used in products for the exploding hand-held market. The standards facilitate the interconnection of multiple, mixed-signal integrated circuit devices on a single hand-held product. Use of the standards ensures low power, low pin count and interoperability of all the devices in the system and easy integration.

Building a high-performance, low-power audio/voice subsystem

With the growing popularity of applications such as mobile gaming and voice triggering, the audio/voice subsystem is playing a prominent role in many mobile system-on-chip (SoC) designs. The subsystem must be designed to meet dual demands: high-performance, high-resolution audio stream processing as well as always-on, low-power voice trigger and recognition. Customizable digital signal processing (DSP) and audio/voice subsystem solution intellectual property (IP) blocks can provide a cost-effective and efficient way to develop and deliver high-performance audio/voice products.

Frequently asked questions about SlimBus IP cores

What is MIPI SLIMbus Hardware Validation Platform?

MIPI SLIMbus Hardware Validation Platform is a Slimbus IP core from Arasan Chip Systems Inc. listed on Semi IP Hub.

How should engineers evaluate this Slimbus?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Slimbus IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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