This Cadence® Verification IP (VIP) provides support for the SPI protocol.
- Verification IP
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
This Cadence® Verification IP (VIP) provides support for the SPI protocol.
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for the SPDIF protocol pro…
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for SMBus provides a bus functional model (BFM), in…
The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio.
In production since 2018 for many production designs.The Cadence® Verification IP (VIP) for Quad SPI provides verification of Q-S…
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for PMBus provides a bus functional model (BFM), in…
In production since 2011.
The Cadence® PIPE PHY Verification IP (VIP) provides a mature, capable verification solution for the PHY layer of complex protoco…
Used by all PCIe, IP, and SoC design verification teams for all generations.The Cadence® Verification IP (VIP) for PCI Express® (…
In production since 2011 for dozens of designs.
Simulation VIP for MIPI UniPro
Best-in-class MIPI® UniPro Verification IP for your IP, SoC, and System-Level Design Testing In production since 2011 on dozens o…
Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® SPMIsm (System Power Management Interface) protoc…
Simulation VIP for MIPI SoundWire-I3S
Best-in-class MIPI® SoundWire-I3Ssm (SWI3S) Verification IP for your IP, SoC, and system-level design testing.The Cadence® Verifi…
Simulation VIP for MIPI SoundWire
In production since 2015 on dozens of production designs.The Cadence®Verification IP (VIP) for the MIPI® SoundWiresm Protocol pro…
Simulation VIP for MIPI SLIMbus
Cadence provides a mature and comprehensive Verification IP (VIP) for the SLIMbus protocol, which is part of the MIPI family.
Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® RF Front-End Control Interface (RFFEsm) protocol.
Best in class MIPI® M-PHYsm Verification IP for your IP, SoC, and, System-level Design Testing In production since 2011 on dozens…
In production since 2015 on dozens of production design.The Cadence® Verification IP (VIP) for MIPI® I3Csm VIP provides support f…
In production since 2008 on dozens of production designs.Cadence provides a mature and comprehensive Verification IP (VIP) for th…
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DPIsm Protocols …