Vendor: Cadence Design Systems, Inc. Category: Slimbus

Simulation VIP for MIPI SLIMbus

Cadence provides a mature and comprehensive Verification IP (VIP) for the SLIMbus protocol, which is part of the MIPI family.

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Overview

Cadence provides a mature and comprehensive Verification IP (VIP) for the SLIMbus protocol, which is part of the MIPI family. Incorporating the latest protocol updates, the SLIMbus VIP provides a complete bus functional model (BFM), integrated automatic protocol checks, coverage model, and compliance tests. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, Cadence SLIMbus VIP helps you reduce time to test, accelerate verification closure, and ensure end-product quality. Our VIP runs on all major simulators and supports SystemVerilog and e verification languages along with associated methodologies, including the Universal Verification Methodology (UVM) and Open Verification Methodology (OVM).

Supported Specifications: MIPI SLIMbus Specification version 1.3 and version 2.0.

Key features

  • Segment distribution
    • SLIMbus v2.0: Supports all segment distribution codes.
  • Multichannel stream
    • SLIMbus v2.0: Supports data carrying on multiple channels that have the same direction and sample rate and that are phase-aligned.
  • Multiline operation
    • Supports up to 8 data lines.
  • Transmits and receives all message types
    • Supports all protocol messages.
  • Transport protocols
    • isochronous, pushed, pulled, async simplex, async half-duplex, extended async simplex, and extended async half-duplex
  • Bus reconfiguration, and bus synchronization
    • Supports component boot-up sequence and recovery of sync loss.
  • Root frequency and clock gear
    • Provides ability to change root frequency and clock gear
  • Information/value elements
    • Supports information/value element messages
  • Full reset flow
    • Supports all kinds of protocol resets
  • Active framer
    • Supports all roles of active framer (framing channel and clocks)
  • Active framer handover
    • Supports the active framer handover flow
  • Clock pause
    • Supports clock pause flows

Block Diagram

Simulation VIP for MIPI SLIMbus block diagram

Specifications

Identity

Part Number
Simulation VIP for MIPI SLIMbus
Vendor
Cadence Design Systems, Inc.
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Cadence Design Systems, Inc.

Learn more about Slimbus IP core

Building a high-performance, low-power audio/voice subsystem

With the growing popularity of applications such as mobile gaming and voice triggering, the audio/voice subsystem is playing a prominent role in many mobile system-on-chip (SoC) designs. The subsystem must be designed to meet dual demands: high-performance, high-resolution audio stream processing as well as always-on, low-power voice trigger and recognition. Customizable digital signal processing (DSP) and audio/voice subsystem solution intellectual property (IP) blocks can provide a cost-effective and efficient way to develop and deliver high-performance audio/voice products.

Vertically Integrated MIPI Solutions

The emerging MIPI standards are designed to ensure interoperability among devices and software that are used in products for the exploding hand-held market. The standards facilitate the interconnection of multiple, mixed-signal integrated circuit devices on a single hand-held product. Use of the standards ensures low power, low pin count and interoperability of all the devices in the system and easy integration.

Frequently asked questions about SlimBus IP cores

What is Simulation VIP for MIPI SLIMbus?

Simulation VIP for MIPI SLIMbus is a Slimbus IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this Slimbus?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Slimbus IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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