Enhanced-Processing Embedded RISC-V Processor
The BA5x-EP is a -featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications.
- RISC-V
Discover CPU and Microcontroller IP for embedded processing, real-time control, and general-purpose computation in semiconductor designs. This category includes processor IP used in SoCs, ASICs, and embedded platforms requiring software programmability, deterministic control, and scalable compute performance.
Compare CPU and Microcontroller IP by ISA, bit width, safety support, performance level, memory architecture, debug features, ecosystem maturity, and target applications. These IP cores are widely used in automotive, industrial, IoT, consumer, and communication chips.
Enhanced-Processing Embedded RISC-V Processor
The BA5x-EP is a -featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications.
Vector-Capable Embedded RISC-V Processor
The EMSA5-GP is a -featured 32-bit RISC-V embedded processor IP core optimized for processing-demanding applications.
Compact Embedded RISC-V Processor
The BA5x-CM is a feature-rich 32-bit deeply embedded processor.
PQPerform-Inferno + RISC-V processor for enhanced crypto-agility
PQPerform-Flex provides robust and agile high-performance acceleration for the ML-KEM and ML-DSA post-quantum cryptographic algor…
Multi-core capable 64-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable 32-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X160 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable RISC-V processor with vector extensions
The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit …
Flexible Pixel Processor Video IP
The PP300 IP, is a flexible Pixel Processor that provides a wide range of processing functions.
The NVP300, AI-based Neural Video Processing IP push video quality to the next level by leveraging the features and benefits of A…
Ultra-low power consumption out-of-order commercial-grade 64-bit RISC-V CPU IP
Dubhe-70 is a 9+ stage, 3-issue, out-of-order CPU IP that supports the rich RISC-V instruction set, RV64GCBH_Zicond_Zicbom_Zicboz…
64-bit application processor for energy-efficient computation
Dubhe-80 processor features a 9+ stage, 3-issue, out-of-order pipeline, fully compliant with a rich set of RISC-V extensions of R…
High Performance 64-bit RISC-V Processor
Dubhe-90 is a high-performance commercial RISC-V CPU Core IP that is deliverable.
32-Bit Automotive Processor - 9-Stage Pipeline, Dual-issue
NA900 series processor is the 1st ISO26262 ASIL-B/D Product Certified RISC-V CPU IP, Nuclei self-developed STL supports multiple …
32-Bit Automotive Processor - 3-Stage Pipeline, Single/Dual-issue
NA300 series processor is a ISO26262 ASIL-B/D Certified RISC-V CPU IP,Nuclei self-developed STL supports multiple ASIL-B automoti…
Nuclei Security processor is a series of chips designed specifically for security application scenarios, including NS100, NS300, …
64-bit High Performance Out-of-Order Processor - Out-of-Order, 3/4/6-Wide Decode
The UX1000 Series have three different variants: UX1030, UX1040 and UX1060.
32-Bit & 64-Bit High Performance Processor - 9-Stage Pipeline, Dual-issue
900 Series processors include four different classes: N900 (32 bit), U900 (32 bit + MMU), NX900 (64 bit) and UX900 (64 bit + MMU).
32-Bit High Efficiency Processor - 3-Stage Pipeline, Single/Dual-issue
N300 Series is a 32-bit RISC-V processor designed for applications requiring extreme energy efficiency and DSP/FPU features.
32-Bit Low Power Processor - 2-Stage Pipeline, Single-issue
N200 Series is designed for deeply embedded application with low power and area consumption.
RVA23, Multi-cluster, Hypervisor and Android
AndesCore™ AX66 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on An…