32-Bit Automotive Processor - 9-Stage Pipeline, Dual-issue

NA900 series processor is the 1st ISO26262 ASIL-B/D Product Certified RISC-V CPU IP, Nuclei self-developed STL supports multiple ASIL-B automotive use cases.

NA900D Series

• Systematic Capability:ASIL D
• Hardware Safety Integrity: ASIL D in DCLS mode

NA900B Series

• Systematic Capability:ASIL D
• Hardware Safety Integrity: ASIL B
• Nuclei self developed Softwate Test Library for ASIL B application
• Fault Injection simulation FMEDA report for configurable design
• ASIL B support fot both split mode and singlecore mode
• Safety enhanced hardware for trade-off between diagnostic coverage and hardware cost

• RISC-V RV32 IMACFDPVBZfh ISA supported
• Dual Issue, in-order 9 stage Harvard Pipeline
• 64-bit AXI System Bus, Configurable 64-bit AXI slave port
• Double, Single and Half-Precision floating point
• Configurable SIMD DSP Extension
• Configurable Instruction and Data Cache
• Configurable ILM (Instruction Local Memory) with ECC
• Configurable DLM (Data Local Memory) with ECC
• PMP supported to meet the system security needs
• Full Standard Debug Function with JTAG and cJTAG Port
• Full Standard RISC-V Toolchain, and Linux\Windows IDE supported

• Real-time Feature
• RV32IMACFDPB
• 9 Stage Pipeline Dual-issue
• I/D Cache
• Security(PMP, TEE)
• AXI System Bus
• RISC-V Standard Debug
• JTAG & cJTAG
• Low Latency Interrupt
• Full Dev Kit & SDK