Vendor: Sifive, Inc. Category: CPU

Multi-core capable RISC-V processor with vector extensions

The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit …

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Overview

The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit VLEN/256-bit DLEN). It supports RISC-V Vectors v1.0 (RVV 1.0) and SiFive Intelligence Extensions to accelerate critical AI/ML operations.

The X280 Gen 2 is scalable up to a 4-core cache-coherent complex. With optional SiFive Scalar Coprocessor Interface (SSCI) and Vector Coprocessor Interface eXtensions (VCIX) for close coupling with customer-designed external AI accelerators or other coprocessors.

Compared to the highly popular first generation, the new product has substantial upgrades including a more configurable and efficient memory subsystem, new hardware accelerated AI instructions, support for new datatypes, and a configurable Vector Load Data Queue (VLDQ) to tolerate memory latencies.

Key features

  • New in Second Generation
    • New RVA23 support
    • New RVV1.0 512-bit vector engine
    • New SSCI interface added alongside VCIX
    • New instructions and extensions
    • New improved memory subsystem
    • New memory latency tolerance
    • New HW support of BF16 datatype
    • New vector crypto support
    • Plus many other new features, enhancements and upgrades
  • 512-bit vector register length processor
    • Variable length operations, up to 512-bits of data per cycle
    • Ideal balance of control logic and data parallel compute
    • Decoupled Vector pipeline
    • INT8 to INT64 integer data type
    • BF16/FP16/FP32/FP64 floating point data type
  • SiFive Intelligence Extensions for ML workloads
    • Custom instructions to greatly accelerate Neural Network computation
    • Optimized IREE MLIR AI/ML software stack and TensorFlow Lite implementation
    • Hundreds of Neural Network models ported
  • Built on silicon-proven U7-Series core
    • 64-bit RISC-V ISA
    • 8-stage dual-issue in-order pipeline
    • Coherent multi-core, Linux capable
  • High performance vector memory subsystem
    • Memory parallelism provides cache miss tolerance
    • Virtual memory support with precise exceptions
    • Up to 48-bit addressing
  • Multi-core, multi-cluster processor configuration, up to 4 cores per cluster
  • RISC-V 64-bit Linux capable scalar/vector processing for standalone AI or Accelerator Control and Assist at the Edge

Block Diagram

Intelligence X280 Gen 2 block diagram

Benefits

  • Performance: SiFive Intelligence Extensions enable enhanced functionality and acceleration instructions for matrix computation so that the X288 processor can achieve a best-in-class 4.5 TFLOPs (bfloat16 MatMul) or 9.2 TOPS (INT8 MatMul) for AI/ML computation acceleration.
  • Power Efficiency: The X288 exhibits superior power efficiency due to its ability to turn off various sections of the chip when not in use.
  • Longevity: RISC-V architecture is a safe bet for long-lived ecosystem support due to open standard ISA

Specifications

Identity

Part Number
Intelligence X280 Gen 2
Vendor
Sifive, Inc.
Type
Silicon IP

Compute

CPU Architecture
RISC-V

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Sifive, Inc.
HQ: USA
Contact Sifive, Inc.

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