N-channel Multiplexed FIR Filter
FIR_NTAP_MUX is an N-channel multiplexed FIR filter designed for high sample rate applications where hardware resources are limit…
- Filters Transforms
- Immediate
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
N-channel Multiplexed FIR Filter
FIR_NTAP_MUX is an N-channel multiplexed FIR filter designed for high sample rate applications where hardware resources are limit…
IIR Filter Second-Order-Section
2nd order IIR filter sometimes referred to as a 'bi-quad'.
Half-band Nyquist Decimation Filter
FIR_DEC_N is a polyphase decimation filter that permits the down sampling of an input signal by any power of 2.
Generic high-speed FIR Filter with symmetry
FIR filter designed for high sample rate applications with symmetrical coefficients and an even or odd number of taps.
Generic ultra-speed FIR Filter
FIR filter designed for very high sample rate applications up to 600 MHz.
The ntI2C_M is an I2C-bus multi-master interface controller and provides a cost-effective solution for a wide range of applicatio…
Configurable Soft Output Demapper
Noesis Technologies Soft Output Demapper is a structural element of any modern telecom system.
The RC4 core implements the RC4 stream cipher in compliance with the ARC4 specification.
The H264-MP-E core is an self-contained hardware H.264 encoder that conforms to the ITU-T H.264 Main Profile.
Supported Standards Decoder : AVC, MVC, MPEG-4, VC-1, MPEG-2, H.263, AVS Jizhun, AVS+ Guangdian, On2 VP8, Sorenson Spark, Theora …
The MIPI DSI-2 controller core is optimized for high performance, low power and small size.
The MIPI CSI-2 controller core is optimized for high performance, low power and small size.
BT656 Decoder with Colour-Space Converter
BT_656_DECODER is a digital video decoder with integrated colour-space converter.
The VID_TIMING_GEN IP Core is a fully configurable video timing generator with the ability to support any video resolution up to …
High-Speed LVDS (SERDES) Transceiver
The LVDS_SERDES IP Core is a high-speed LVDS transmitter / receiver pair suitable for a wide range of serial interface applicatio…
Video Frame Buffer IP Core Rev. 2.0
The VID_FRAME_BUFFER (VFB) IP Core is a high-speed multi-format video frame buffer that samples an input video stream and buffers…
Multi-format Video Deinterlacer
The DEINTERLACER IP Core is a high quality 24-bit RGB video deinterlacer capable of generating progressive output video at up to …
Motion-adaptive Video Deinterlacer IP Core
The DEINTERLACER_MA IP Core is a studio quality 24-bit RGB video deinterlacer capable of generating progressive output video at a…
95 dB of SNR, 24-bit stereo audio CODEC with AGC and headphone output
SoC integrators wishing to address portable audio applications like Smart Phones, PMP or Portable Multimedia Devices for mobile c…
Display Controller - LCD / OLED Panels (AXI4 Bus)
The DB9000AXI4 LCD / OLED Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI4 Protoc…