2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 um
This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18μm CL180G CMOS technolog…
- Silterra
- 180nm
- G
- Silicon Proven
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 um
This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18μm CL180G CMOS technolog…
Low-Power 8-bit SAR ADC - 8 bits, 50kSPS, Low Voltage (1.8V), Low Power (20µA) TowerJazz 0.18 um
This macro-cell is a low power, general purpose, 8-bit, 50kSPS, Successive Approximation Register (SAR) Analog-to-Digital Convert…
Li-Ion Battery Charger - ±1% Accuracy (4.2V) / Up to 1500mA Fast Charge - Silterra 0.18 um
This macro-cell is a precision linear Li-Ion battery charger core (4.2V, +/-1%) designed for SilTerra CL180GH5 0.18μm CMOS techno…
Power-On Reset - Flexible Threshold (1-1.3V), Ultra Low Current (100nA) - Silterra 0.18 um
This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.18μm CL180G CMOS technology.
CT22202 is a silicon proven analog-to-digital converter specifically designed to accomplish the most stringent performance requir…
CT21100 is high efficiency DCDC boost converter delivering 2.7V at 10mA from an input as low as 0.9V.
CT22105 is a 12-bit Pipeline ADC with single-ended to fully differential Sample and Hold and integrated Voltage and Current refer…
Mature controller solution for OTG and Device applications
Brite provides USB2.0 OTG PHY which is a mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (So…
Universal Multi-port Memory Controller for RLDRAM2/3, DDR5/4/3, DDR4 3DS and LPDDR3/2 and LPDDR3/2
The UMMC (Universal Multi-port Memory Controller for RLDRAM2/3, DDR5/4/3, DDR4 3DS and LPDDR3/2 and LPDDR3/2) is a flexible and c…
RTP/UDP/IP Protocol Hardware Stack – Raw, Uncompressed RGB/YUV Video Streams Packet Processing
The DB-RTP-UDP-IP Intellectual Property Core is an RTP/UDP/IP Protocol Hardware Stack with the following protocol processing unit…
I2C Controller IP – Slave, User Register Interface, No CPU Required
The DB-I2C-S-REG is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal conf…
Half Precision IEEE-754R complete FPU for graphics processing
The A2FH is a co-processor unit providing floating-point computation compliant with the ANSI/IEEE Std 754-2008, IEEE Standard for…
Asynchronous FIFO with configurable flags and counts
The aFIFO2 controls are designed to ensure hazard free clock domain crossing between the read and write ports.
Synchronous FIFO with configurable flags and counts
The sFIFO controls are designed to operate over a wide range of clock frequencies.
CCSDS (8160,7136) LDPC Decoder
The LCD01C is a fully compatible CCSDS rate 223/255 (8160,7136) LDPC error control decoder.
CCSDS (8160,7136) LDPC Encoder
The LCE01C is a fully compatible CCSDS rate 223/255 (8160,7136) LDPC error control encoder.
The ZUC-IP-48 (EIP-48) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as sp…
High Profiles H.264 Encoder − High 10, High 4:2:2 and High 4:4:4 (12-bit 4:2:2 or 4:2:0) Profiles
The H264-HP-E core is an and self-contained ITU-T H.264 High profiles hardware encoder.
Baseline Profile H.264 Encoder
The H264-BP-E core is an self-contained hardware H.264 encoder that conforms to the ITU-T H.264 Constrained Baseline Profile.