Differential Clock Receiver to CML on TSMC CLN7FF
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
- TSMC
- 7nm
- N7FF
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Differential Clock Receiver to CML on TSMC CLN7FF
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
Differential Clock Receiver to CML on TSMC CLN6FF
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
Differential Clock Receiver to CML on TSMC CLN5A
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
Differential Clock Receiver to CML on TSMC CLN5
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
Differential Clock Receiver to CML on TSMC CLN4P
The Differential Clock Receiver to CML macro addresses a large portfolio of applications.
Differential Clock Receiver to CML on TSMC CLN3P-CLN3X
The Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of appl…
Differential Clock Receiver to CML on TSMC CLN3E
The Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of appl…
Differential Clock Receiver on TSMC CLN7FF
The Differential Clock Receiver macro addresses a large portfolio of applications.
Differential Clock Receiver on TSMC CLN4P
The Differential Clock Receiver macro addresses a large portfolio of applications.
DDR3/DDR3L Compatible I/O Buffer on TSMC CLN40G
The impedance programmable I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths dema…
Custom Programmable Low Power SERDES on GLOBALFOUNDRIES 65G
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
Crystal-less Low Power Oscillator on TSMC CLN28HPC+
The Crystal-less low power oscillator addresses a variety of applications that include low power consumer and professional applic…
Crystal-less Low Power Oscillator on TSMC CLN16FFC
The Crystal-less low power oscillator addresses a variety of applications that include low power consumer and professional applic…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
CML Buffer on TSMC CLN3P-CLN3X
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…