USB 2.0 HS OTG PHY IP Listing

USB 2.0 OTG PHY, UMC 0.11um HS AL Logic process.

• UMC
• 110nm
• HS

The USB 2.0 OTG IP Core is compliant with the OTG Supplement Rev.

• USB

The USB 2.0 Hub IP core is a USB 2.0 specification compliant hub core that supports 480 Mbit/s in High Speed (HS) mode, 12 Mbit/s…

• USB

The USB 2.0 Host IP is a USB 2.0 specification compliant host IP core with an optional AHB, PCI, or custom host interface.

• USB

The USB 2.0 Device IP core is Arasan’s latest development that enables designers in the PC, mobile, consumer and communication ma…

• USB

The USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specific…

• Single-Protocol PHY

The Arasan USB 2.0 OTG DRD IP Core is compliant with the OTG Supplement Rev.

• USB

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• GlobalFoundries
• 55nm
• LPe
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• UMC
• 65nm
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• TSMC
• 40nm
• LP eFlash
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• SMIC
• 65nm
• LL
• Available on request

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

The USB PHY IP is UTMI interface compatible and a dedicated circuit for full-function USB 2.0 transceivers.

• Single-Protocol PHY

The Synopsys USB 2.0 Controllers support Hi-Speed (480 Mbps), Full Speed (12 Mbps), and Low Speed (1.5 Mbps) operation based on U…

• USB
• Available on request
• Available

The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.

• Samsung
• 28nm
• FDS
• Pre-Silicon

The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.

• GlobalFoundries
• 28nm
• Silicon Proven

LTTS USB 2.0 OTG controller are designed for compliance with USB2.0 specification Revision 2.0 and all associated ECN’s and USB O…

• USB
• FPGA validated
• Now
• USB2.0 Revision 2.0

USB 3.0/3.1/3.2 Verification IP provides a smart way to verify the USB 3.0/3.1/3.2 component of a SOC or a ASIC.

• Verification IP