Vendor: Arasan Chip Systems Inc. Category: USB

USB 2.0 Device IP Core

The USB 2.0 Device IP core is Arasan’s latest development that enables designers in the PC, mobile, consumer and communication ma…

Contact Provider Request Datasheet

Overview

The USB 2.0 Device IP core is Arasan’s latest development that enables designers in the PC, mobile, consumer and communication markets to bring significant power and performance enhancements to the popular USB standard while offering backward compatibility with billions of USB-enabled devices currently in the market.

The Arasan USB 2.0 compliant device core is available with an AHB/AXI, OCP or custom system bus interface. The USB2.0 device core supports 480 Mbits/s in High Speed (HS) mode and 12 Mbits/s in Full Speed (FS) mode of operation. Arasan provides designers with a comprehensive, silicon-proven configurable digital USB 2.0 Device solution that conforms to the USB 2.0 specification. It is designed to seamlessly integrate into any SoC design for an easy and cost effective solution. The Arasan USB 2.0 IP core supports up to 30 configurable IN/OUT non-control endpoints.

Each non-control endpoint has a controller for supporting interrupt, bulk and isochronous transfers. The dedicated control endpoint 0 handles USB defined command structure for Device Control. The USB 2.0 Device IP includes a multi-channel DMA that can be configured to access any endpoint through registers. Optionally, it can interface with an external DMA controller. The USB 2.0 Device IP core provides a UTMI/ULPI interface that allows connection to any USB 2.0 transceiver module. This product is listed in the USB.org database as ACS201.

Arasan is the among the industry’s first providers of USB IP with the launch of its USB 1.1 Device IP in 1996 and the industries ONLY provider to offer a Total USB 2.0 IP Solution which includes its USB 2.0 Host IP Core, USB 2.0 Device IP Core, USB 2.0 Hub IP, USB 2.0 OTG IP, the USB 2.0 PHY IP and software for multiple OS..

Key features

  • High speed support: 480 Mbit/s
  • Full speed support: 12 Mbit/s
  • USB 2.0 Compliant
  • High/Full speed support using 8/16 bit UTMI/ULPI interface
  • Master DMA implementation for each endpoint
  • Optional PIO Mode for each endpoint (can be used for Interrupt endoints)
  • System bus Master/Target clock
  • UTMI Interface Clock: 30/60 MHz
  • Endpoint Configuration
  • Configurable up to 15 Tx and Rx endpoints
  • Configuration options: Bulk, control, isochronous, interrupt
  • Dedicated control endpoint zero
  • Configurable dual port RAM shared between endpoints
  • USB Suspend/Resume support
  • 32/64 bit AXI, AHB or OCP bus interfaces

Block Diagram

USB 2.0 Device IP Core block diagram

Benefits

  • Fully compliant to USB 2.0 specifications
  • Highly flexible and configurable
  • Ideal for easy and cost-effective device integration
  • Premier direct support from Arasan IP Engineering Team

What’s Included?

  • RMM-compliant synthesizable RTL design in Verilog
  • Easy-to-use test environment
  • Synthesis scripts
  • Technical documents
  • Simulation scripts

Specifications

Identity

Part Number
USB 2.0 Device IP Core
Vendor
Arasan Chip Systems Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Arasan Chip Systems Inc.

Learn more about USB IP core

SuperSpeed USB 3.0: Ubiquitous Interconnect for Next Generation Consumer Applications

To address the bandwidth limitations of the USB 2.0 interface, the USB Implementers Forum (USB-IF) released the SuperSpeed USB 3.0 specifications in November 2008. The USB 3.0 specification provides a maximum bandwidth of up to 5Gbps while limiting power consumption. In this white paper we present the features of the USB 3.0 protocol, discuss the new usage models it enables and compare it with some of the existing interface standards popular in the market today.

eUSB2V2: Trends and Innovations Shaping the Future of Embedded Connectivity

In an era defined by rapid technological advancement, embedded interfaces must evolve to meet the demands of smaller form factors, lower power budgets, and diversified use cases. Among these interfaces, eUSB2V2 (Embedded USB 2.0 Version 2) has emerged not just as a legacy-support PHY, but as a strategic enabler of robust, low-power connectivity across next-generation systems-on-chip (SoCs).

Frequently asked questions about USB IP cores

What is USB 2.0 Device IP Core?

USB 2.0 Device IP Core is a USB IP core from Arasan Chip Systems Inc. listed on Semi IP Hub.

How should engineers evaluate this USB?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP