ChipScope Pro IBERT for Virtex-7 GTX
The ChipScope™ Pro IBERT core for Virtex®-7 FPGA GTX transceivers is customizable and designed for evaluating and monitoring Virt…
- Test / Debug
ChipScope Pro IBERT for Virtex-7 GTX
The ChipScope™ Pro IBERT core for Virtex®-7 FPGA GTX transceivers is customizable and designed for evaluating and monitoring Virt…
ChipScope Pro IBERT for Kintex-7 GTX
The ChipScope™ Pro Integrated Bit Error Ratio Tester (IBERT) core for Kintex™-7 FPGA GTX transceivers is a customizable core that…
AXI XADC IP provides the controller interface for System Monitor XADC hard macro on the Virtex®-7, Kintex™-7, Artix™-7 FPGA famil…
The AXI Quad Serial Peripheral Interface connects the AXI4 interface to those SPI slave devices which are supporting the Dual or …
The AMBA® ( Microcontroller Bus Architecture) AHB-Lite ( High Performance Bus) to AXI ( extensible interface) bridge translates A…
7 Series FPGA Transceivers Wizard
The LogiCORE™ IP 7 Series FPGAs Transceivers Wizard automates the task of creating HDL wrappers to configure Xilinx 7 Series FPGA…
Remote Debug using Vivado Design Suite Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and prov…
The Processor Local Bus (PLB v4.6) to AMBA® ( Microcontroller Bus Architecture) eXtensible Interface (AXI) Bridge translates PLBV…
PicoBlaze 8-bit Microcontroller
PicoBlaze™ is a fully embedded 8-bit RISC microcontroller core optimized for 7-series and older Xilinx FPGA architectures.
Mutex provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource in a mult…
Mailbox features a bi-directional communication channel between two processors.
The ChipScope™ AXI Monitor core is designed to monitor and debug AXI interfaces.
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core that provides high-bandwidth direct memory access bet…
The LogiCORE™ IP AXI Universal Asynchronous Receiver Transmitter (UART) Lite interface connects to the Microcontroller Bus Archit…
The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the AMBA® (Advance Microcontroller Bus Architecture)…
This document describes the specifications for a Microcontroller Bus Architecture (AMBA®) specification’s eXtensible Interface (A…
The eXtensible Lite (AXI) Timebase Watchdog Timer is a 32-bit peripheral that provides a 32-bit free-running timebase and watchdo…
AXI System Monitor Analog/Digital Converter
The AXI Sysmon ADC IP Core is a 32-bit slave peripheral that connects to the AXI4 ( eXtensible Interface) and provides the trolle…
AXI SystemACE Interface Controller
The AXI System ACE™ Interface Controller (AXI SYSACE) is the interface between the AMBA® AXI4 Lite and the Microprocessor Unit (M…
The LogiCORE® IP AXI Slave Burst is an interface between the AXI4 memory-mapped interface to the IPIC (IP Inter Connect).