AMD Receives All Necessary Approvals for Proposed Acquisition of Xilinx
AMD (NASDAQ: AMD) today announced that it has received approval from all necessary authorities to proceed with the acquisition of Xilinx, Inc. (NASDAQ: XLNX).
Vendor:
Xilinx, Inc.
Category:
Debug Trace
ChipScope AXI Monitor
The ChipScope™ AXI Monitor core is designed to monitor and debug AXI interfaces.
Overview
The ChipScope™ AXI Monitor core is designed to monitor and debug AXI interfaces. The core allows the probing of any signals going from a peripheral to the AXI interconnect. For example, the user can instantiate a monitor on a MicroBlaze™ instruction or data interface to observe all memory transactions going in and out of the processor.
Key features
- Selectable data samples
- Generic Trigger/Data Unit with selectable width
- Auto-generated CDC file
- Multiple monitor support in single system through the use of trigger in and trigger out ports
- Allows multiple match units per trigger group
- Added functionality for more than one match unit per trigger group
- Adjustable counter size for triggers
- Selectable AXI Protocol Check monitoring for the AXI4 Memory Map and AXI4-Lite interface
- Supports connection to AXI3 Protocol Cores
- Supports EDK and standard CORE Generator flows
Specifications
Identity
Part Number
ChipScope AXI Monitor
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about Debug Trace IP
What is ChipScope AXI Monitor?
ChipScope AXI Monitor is a Debug Trace IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this Debug Trace?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Debug Trace IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.