AMD Receives All Necessary Approvals for Proposed Acquisition of Xilinx
AMD (NASDAQ: AMD) today announced that it has received approval from all necessary authorities to proceed with the acquisition of Xilinx, Inc. (NASDAQ: XLNX).
Vendor:
Xilinx, Inc.
Category:
ADC
AXI System Monitor Analog/Digital Converter
The AXI Sysmon ADC IP Core is a 32-bit slave peripheral that connects to the AXI4 ( eXtensible Interface) and provides the trolle…
Overview
The AXI Sysmon ADC IP Core is a 32-bit slave peripheral that connects to the AXI4 (Advanced eXtensible Interface) and provides the troller interface for System Monitor (SYSMON) hard macro on Virtex®-6 family of FPGAs. This document describes the specifications for AXI Sysmon ADC IP Core.
Key features
- AXI4-Lite interface is based on the AXI4 specification
- Connects as a 32-bit AXI4-Lite slave
- Uses dedicated System Monior (SYSMON) hard macro on Virtex-6 devices
- Supports 10-bit, 200-kSPS (kilo-Samples Per Second) Analog-to-Digital Converter (ADC)
- Supports on-chip monitoring of supply voltages and temperature
- Supports 1 dedicated high bandwidth differential analog-input pair and 16 auxiliary low bandwidth differential analog-input pairs
- Supports automatic alarms based on user defined limits
Specifications
Identity
Part Number
AXI System Monitor Analog/Digital Converter
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about ADC IP cores
What is AXI System Monitor Analog/Digital Converter?
AXI System Monitor Analog/Digital Converter is a ADC IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this ADC?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.