Multi-Protocol AMBA Support - Advanced Routing & Arbitration - Virtual Channel Deadlock Avoidance - Unlimited Scaling
- Network-On-Chip
Multi-Protocol AMBA Support - Advanced Routing & Arbitration - Virtual Channel Deadlock Avoidance - Unlimited Scaling
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master …
Truechip's NoC Verification IP provides an efficient & effective way to verify the NoC DUT.
FlexGen Smart Network-on-Chip (NoC) IP
AI-enhanced automation for smarter SoC and chiplet designs.
Get to market faster using our highly configurable network on chip
Non-Coherent Network-on-Chip (NOC)
Performance (bandwidth and latency) optimized non-coherent NOC solution that significantly reduces silicon wire utilization, resu…
The Tessent Embedded Analytics NoC Monitor provides non-intrusive monitoring of interconnect activity across the AMBA 5 CHI (Cohe…
Coherent Network-on-Chip (NOC)
Scalable and area efficient interconnect solution optimized for memory coherent systems
Network-on-Chip (NoC) Interconnect IP
Vtool NoC Interconnect IP is a configurable and technology independent IP, built for easy customization and integration into any …
InfiniNoC is a highly customizable interconnect fabric designed to provide a scalable, high-performance communication backbone for next-generation SoCs.
Coherent Network-on-chip (NoC) IP
UCIe D2D · CHI Rev E.b · Mesh & Ring · iNoCulator-generated RTL
Non-coherent Network-on-chip (NoC) IP
NC-NOC · AXI4 · Low power · All dies
Input/Output Memory Management Unit
SMMUv3 · Two-stage translation · DMA protection
The Network on Chip (NOC) technology redefines typical NOC capabilities as it extends the on-chip network beyond chip(let) bounda…
The Tessent Embedded Analytics solution can be used to produce health and operational metrics throughout the lifecycle of an SoC.
Tessent Automotive IC debug and optimization
Vehicles are becoming complex systems approaching billions of lines of code.
Tessent AI IC debug and optimization
The multicore architectures of SoCs for machine learning (ML) and artificial intelligence (AI) applications provide unique challe…
Tessent SoC debug and optimization
Tessent Embedded Analytics accelerates debug, validation, and optimization of complex multi-core SoCs.
The memory subsystem of the new generation of AI chips needs to have numerous features, such as the ability to reduce latency, co…
High-Performance AXI to UCIe FDI Interface IP for Scalable System Integration