Vendor: Signature IP Corporation Category: Network-On-Chip

Non-coherent Network-on-chip (NoC) IP

NC-NOC · AXI4 · Low power · All dies

Overview

Lightweight non-coherent fabric for IO peripherals, DMA engines, and subsystem controllers. Optimised for area and power. Present in all three chiplet dies.

Key specifications

Protocol AXI4 / AXI4-Lite
Topology Configurable
Power Optimised
Deployment All three silicon units
Toolchain iNoCulator shared
Sign-off Siemens Questa

Technical details

Interface AXI4 / AXI4-Lite
Masters Configurable
Slaves Configurable
Clock Single or multi-clock
Reset Synchronous / async
Silicon All three silicon units

Key features

  • AXI4 / AXI4-Lite interface
  • Configurable topology
  • Power-optimised design
  • iNoCulator toolchain shared with UCIe D2D

Block Diagram

Specifications

Identity

Part Number
NC-NoC
Vendor
Signature IP Corporation
Type
Silicon IP

Provider

Learn more about Network-On-Chip IP core

Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures

Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdropping attacks via malicious nodes are among the most common and stealthy. Although encryption can secure packets for confidentiality, it may introduce unacceptable overhead for resource-constrained SoCs.

Why verification matters in network-on-chip (NoC) design

In this article, we will dive deeper into a comprehensive methodology for formally verifying an NoC, showcasing the approaches and techniques that ensure our NoC designs are robust, efficient, and ready to meet the challenges of modern computing environments.

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.

Accelerating RISC-V development with network-on-chip IP

In the world of system-on-chip (SoC) devices, architects encounter many options when configuring the processor subsystem. Choices range from single processor cores to clusters to multiple core clusters that are predominantly heterogeneous but occasionally homogeneous.

Frequently asked questions about NoC IP cores

What is Non-coherent Network-on-chip (NoC) IP?

Non-coherent Network-on-chip (NoC) IP is a Network-On-Chip IP core from Signature IP Corporation listed on Semi IP Hub.

How should engineers evaluate this Network-On-Chip?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Network-On-Chip IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP