Vendor: Cadence Design Systems, Inc. Category: Network-On-Chip

NoC System IP

Get to market faster using our highly configurable network on chip

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Overview

Reduce Risk and Improve Productivity

In a business environment, where design timelines are shrinking, while the need for custom solutions increases, design teams are relying more than ever on reputable, reliable IP solutions. With this increasing complexity, connectivity fabric complexity also increases. Cadence Janus NoC System IP, a highly configurable, high-performance, network-on-chip IP, addresses this complexity, from the subsystem level all the way up to multi-chiplet systems.

IP solutions are needed to address complexity and allow design teams to focus on the critical elements that differentiate their design. The Cadence Janus NoC can be configured with little effort using state-of-the-art GUI tools while power, performance, and area (PPA) metrics can be verified and further optimized by using Cadence simulation/emulation solutions.

Key features

Simple and Efficient Interconnect for the Most Complex SoC Designs

  • Reduces wire count and congestion
  • Reduces physical design issues
  • Handles gear change automatically
  • Configurable to meet your PPA goals
  • Easy to configure with a quick turnaround of configuration changes
  • Use with Cadence simulation/emulation to identify bottlenecks and remove them

Block Diagram

Janus NoC block diagram

Benefits

Intuitive Design Entry Tool

  • Use a powerful GUI to generate a NoC configuration, then submit the configuration to get RTL and SystemC models

Highly Configurable

  • Configure BW, latency, clock domain crossings, clock gating, buffer size, and pipeline stages—everything you need to achieve your target PPA goals

Scalability

  • Start with subsystem design, then take the same design and create a full SoC; Need a higher level of integration? No problem, we can do chiplets as well

Specifications

Identity

Part Number
Janus NoC
Vendor
Cadence Design Systems, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Cadence Design Systems, Inc.

Learn more about Network-On-Chip IP core

Heterogeneous Multicore using Cadence IP

This blog presents a heterogeneous multicore system built with the RISC-V Host CPU and Cadence IP: Xtensa DSPs, and the Janus Network-on-Chip (NoC). While this example uses an RISC-V CPU, any other ISA with similar capabilities can also serve as the host CPU.

Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures

Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdropping attacks via malicious nodes are among the most common and stealthy. Although encryption can secure packets for confidentiality, it may introduce unacceptable overhead for resource-constrained SoCs.

Why verification matters in network-on-chip (NoC) design

In this article, we will dive deeper into a comprehensive methodology for formally verifying an NoC, showcasing the approaches and techniques that ensure our NoC designs are robust, efficient, and ready to meet the challenges of modern computing environments.

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.

Frequently asked questions about NoC IP cores

What is NoC System IP?

NoC System IP is a Network-On-Chip IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this Network-On-Chip?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Network-On-Chip IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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