Vendor: SkyeChip Category: Network-On-Chip

Non-Coherent Network-on-Chip (NOC)

Performance (bandwidth and latency) optimized non-coherent NOC solution that significantly reduces silicon wire utilization, resu…

Overview

Performance (bandwidth and latency) optimized non-coherent NOC solution that significantly reduces silicon wire utilization, resulting in power and area efficient ICs

Key features

  • Node Protocols: AXI4, AXI5, AXI-Stream, APB and proprietary protocols
  • Architected to reduce routing congestion and to ease high frequency timing closure
  • Supports operating frequencies up to 2GHz
  • Supports source synchronous and synchronous clocking topologies
  • Supports 2.5D and 3D die-to-die NOC bridging
  • Integrates seamlessly with SkyeChip’s Coherent NOC for partitioned interconnect systems

Specifications

Identity

Part Number
Non-Coherent Network-on-Chip (NOC)
Vendor
SkyeChip
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Malaysia

Learn more about Network-On-Chip IP core

SAIMEMORY And SkyeChip Collaborate on Next-Generation memory “ZAM” for AI

SAIMEMORY is developing ZAM, a next-generation memory technology designed for data centers and other environments that require the training and inference of large-scale AI models. Under the engagement, SkyeChip will provide design and engineering support as well as custom IP solutions for the ZAM program, leveraging its expertise in silicon design and integration.

Frequently asked questions about NoC IP cores

What is Non-Coherent Network-on-Chip (NOC)?

Non-Coherent Network-on-Chip (NOC) is a Network-On-Chip IP core from SkyeChip listed on Semi IP Hub.

How should engineers evaluate this Network-On-Chip?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Network-On-Chip IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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