AXI to UCIe FDI Interface IP

Menta AXI2FDI IP is designed to derisk the fragmentation of chiplet communication standards. Functions at protocol layer between interconnect and chiplet communication interfaces.

Allows flexible protocol layer encoding and decoding, can be adapted to newly appearing protocol implementations.

Powered by Menta’s eFPGA technology, AXI2FDI provides unmatched flexibility and adaptability. It introduces adaptability directly into interface design. This enables designers to modify, optimize, and evolve data paths post-fabrication, ensuring long-term flexibility in rapidly changing system environments.

eFPGA Means Lower Power Consumption

In a COT FPGA, all the extra to the programmable logic, such as high-speed interfaces, PLL, and controllers consume around half of the power. All our power saving advances lead an algorithm on a Menta eFPGA IP to consume between 10 and 50% of the power of the same algorithm on a FPGA.

Future proof your die2die system investment

The absence of dominating protocol and rapid evolution and fragmentation of chiplet standards introduce massive risk to multi-die investments. The AXI2FDI future-proofs your System-in-Package by allowing for updates after tapeout. It ensures your silicon remains highly adaptable to future unknowns.

D2D communication security

AXI2FDI may implement a hardware-assisted, low-latency security layer directly between the NoC and D2D adapter. It enables implementation of custom encryption and decryption protocols, securing all inter-die traffic.

Advanced traffic management

AXI2FDI may be used to apply advanced traffic management policies (such as filtering, QoS..) directly at the protocol layer. The policies and rules can be dynamically managed by software. Filtering out unneeded data significantly reduces the load on system resources such as interconnect and memory, improving overall performance.

General purpose programmable logic

eFPGA serves as a core allowing all the great benefits. Thanks to independent data exchange interfaces, its programmable logic can be used independently of functionalities described above. It can implement any custom logic such as accelerators, cryptography etc.

Longer lifetime

AXI2FDI extends your SiP lifetime by absorbing the risk of evolving chiplet standards. Your development efforts are protected from industry fragmentation.

Simplifies test and software development

The AXI2FDI can be used to observe and analyse traffic and also control D2D system blocks in real time thus helping bring-up, test and software development activities.

• Powered by Menta’s eFPGA technology, AXI2FDI provides unmatched flexibility and adaptability. It introduces adaptability directly into interface design. This enables designers to modify, optimize, and evolve data paths post-fabrication, ensuring long-term flexibility in rapidly changing system environments.
• It supports seamless integration across various SoC architectures. Adaptability comes at low overhead costs.

AXI2FDI IP enables efficient and flexible data integration across a wide range of applications, including:

• Edge computing and physical AI
• Industrial and robotics
• Automotive and mobility
• Telecommunications and 5G/6G infrastructure
• Aerospace and defense systems. 

Its adaptability and performance make it an ideal solution for designers seeking to build scalable, future-proof systems.