Vendor: Signature IP Corporation Category: System Controller

Input/Output Memory Management Unit

SMMUv3 · Two-stage translation · DMA protection

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Overview

Input/Output Memory Management Unit providing address translation, memory protection, and DMA access control for peripheral devices on the NoC.

Key specifications
 

Spec SMMUv3
Translation Two-stage S1+S2
TLB Hardware walker
Interface CHI slave port
Interrupts Fault reporting
Deployment Compute silicon


Technical details
 

Translation stages S1 and S2
Page sizes 4KB 16KB 64KB 1GB
TLB entries Configurable
NoC attach CHI RN-I
OS support Linux SMMU driver
Silicon Compute silicon

 

Key features

  • SMMUv3 architecture
  • Two-stage S1+S2 translation
  • TLB & page-table walk hardware
  • CHI NoC slave port integration

Block Diagram

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Specifications

Identity

Part Number
IOMMU
Vendor
Signature IP Corporation
Type
Silicon IP

Provider

Contact Signature IP Corporation

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Frequently asked questions about system controller IP cores

What is Input/Output Memory Management Unit?

Input/Output Memory Management Unit is a System Controller IP core from Signature IP Corporation listed on Semi IP Hub.

How should engineers evaluate this System Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this System Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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