Configurable interleaving/deinterleaving function that can be used in a wide range of applications that employ channel coding.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
Configurable interleaving/deinterleaving function that can be used in a wide range of applications that employ channel coding.
configurable Viterbi Decoder compliant with the requirements of nearly all modern standards using Viterbi error correction.
Configurable Reed Solomon Encoder
A fully configurable Reed Solomon Encoder compliant with the requirements of nearly all modern standards that use Reed-Solomon er…
Configurable Reed Solomon Decoder
configurable Reed Solomon Decoder compliant with the requirements of nearly all modern standards using Reed-Solomon error correct…
This high performance core is a full featured Forward Error Correction encoder and decoder, specially designed for high speed opt…
Application Adaptive Processor
A2P is a flexible processor architecture based on an “fine-grain” microarchitecture configurability and an expandable instruction…
32-bit RISC Processor To Deliver High Performance In Low-Cost Microcontroller Applications
The Cortex-M3 processor is specifically developed to enable partners to develop high-performance, low-cost platforms for a broad …
This high performance, fully configurable Reed Solomon Encoder IP Core is intended for use in a wide range of applications requir…
This high performance, fully programmable Reed Solomon Decoder IP Core is intended for use in a wide range of applications requir…
6809 compatible 8-bit microprocessor
iniCPU, a 8-bit micro processor, enables embedded computing and controlling on chip.
Hardware link (de)compression IP for die-to-die, chip-to-chip, and DRAM interfaces
Expands effective bandwidth across links and memory interfaces with deterministic, data-independent latency, fully pipelined to sustain line rate
High performance-efficient edge deep learning accelerator for small LLM/VLM/VLA and CNN/RNN/LSTM
Clustered IP to Scale Throughput
When one engine isn’t enough, Atrevido Cluster multiplies throughput under the same ISA and memory‑first design (CPU/Vector, optionally Tensor‑equipped instances)
Scaled for heavier inference and higher throughput
C1 is a compact, fully programmable RISC‑V AI IP core for real‑time inference
Single 1024-bit SIMD DSP for Vision/Radar/Lidar/AI
These cores implement a Bose-Chaudhuri-Hocquenghem (BCH) error correction code configured to process a k-bit codeword, providing …
10xEngineers Debug & N-Trace IP delivers a unified Debug + Trace solution that provides full-system visibility with low overhead …
eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
RapidFlex eFPGA IP provides a reconfigurable, upgradeable, and iterative logic computing layer for SoCs, MCUs, AI accelerators, i…
Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
Maximum performance for running Linux high-end applications.