64-bit RISC-V core with in-order single issue pipeline based complex.
- RISC-V
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
64-bit RISC-V core with in-order single issue pipeline based complex.
Tiny, Ultra-Low-Power Embedded RISC-V Processor
The BA5x-TN is a compact, ultra-low power, 32-bit, deeply embedded processor IP core.
Low-Power Embedded RISC-V Processor
The BA5x-LP is a efficient, low-power, 32-bit, deeply embedded processor IP core.
Enhanced-Processing Embedded RISC-V Processor
The BA5x-EP is a -featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications.
Vector-Capable Embedded RISC-V Processor
The EMSA5-GP is a -featured 32-bit RISC-V embedded processor IP core optimized for processing-demanding applications.
Compact Embedded RISC-V Processor
The BA5x-CM is a feature-rich 32-bit deeply embedded processor.
PQPerform-Inferno + RISC-V processor for enhanced crypto-agility
PQPerform-Flex provides robust and agile high-performance acceleration for the ML-KEM and ML-DSA post-quantum cryptographic algor…
Multi-core capable 64-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable 32-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X160 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable RISC-V processor with vector extensions
The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit …
Ultra-low power consumption out-of-order commercial-grade 64-bit RISC-V CPU IP
Dubhe-70 is a 9+ stage, 3-issue, out-of-order CPU IP that supports the rich RISC-V instruction set, RV64GCBH_Zicond_Zicbom_Zicboz…
64-bit application processor for energy-efficient computation
Dubhe-80 processor features a 9+ stage, 3-issue, out-of-order pipeline, fully compliant with a rich set of RISC-V extensions of R…
CPU IP Following the RVA23 Profile, supporting RVV1.0 and all extensions of Vector Crypto
Dubhe-83 CPU IP features a 10+ stage pipeline, 3-issue, and out-of-order pipeline, follows the RVA23 Profile, supports RV64GCBVH,…
High Performance 64-bit RISC-V Processor
Dubhe-90 is a high-performance commercial RISC-V CPU Core IP that is deliverable.
GPNPU Processor IP - 32 to 864TOPs
Designed from the ground up to address significant machine learning (ML) inference deployment challenges facing system on chip (S…
GPNPU Processor IP - 16 to 108 TOPs
Designed from the ground up to address significant machine learning (ML) inference deployment challenges facing system on chip (S…
GPNPU Processor IP - 4 to 28 TOPs
Designed from the ground up to address significant machine learning (ML) inference deployment challenges facing system on chip (S…
32-Bit Automotive Processor - 9-Stage Pipeline, Dual-issue
NA900 series processor is the 1st ISO26262 ASIL-B/D Product Certified RISC-V CPU IP, Nuclei self-developed STL supports multiple …
32-Bit Automotive Processor - 3-Stage Pipeline, Single/Dual-issue
NA300 series processor is a ISO26262 ASIL-B/D Certified RISC-V CPU IP,Nuclei self-developed STL supports multiple ASIL-B automoti…
Nuclei Security processor is a series of chips designed specifically for security application scenarios, including NS100, NS300, …