Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
DVB-S2X NarrowBand Demodulator IP
This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to…
AIoT processor with vector computing engine
I805 utilizes a 4-stage sequential pipeline, and is equipped with a vector computing engine oriented to applications such as AI a…
ATAN_X calculates the inverse tangent of a fraction.
SINCOS_X calculates the sine and cosine of an angle in radians.
PIPE_SQRT is a pipelined square-root with configurable data width.
PIPE_DIV is a pipelined divider with configurable data width.
Pipelined Multiplier with generic width and depth
PIPE_MULT is a general purpose multiplier with a configurable data width and configurable number of pipeline stages.
SIN_X calculates the sine of an angle.
COS_X calculates the cosine of an angle in radians.
Single 512-bit SIMD DSP for Vision/Radar/Lidar/AI
Built on our latest Xtensa NX architecture and offers up to 2.18TOPS of performance The Cadence® Tensilica® Vision Q7 DSP deliver…
The 18-bit Pipeline DSP slice IP Core provides the best utilization of device resources like memory, I/O, processor and clock.
16 state DVB-RCS2 Turbo Encoder
This is a 16 state DVB-RCS2 compatible parallel concatenated turbo encoder.
Smallest and lowest power DSP for narrowband wireless communications and always-on applications The Cadence® Tensilica® Fusion F1…
FlexCFR is a communications standard agnostic, crest factor reduction solution.
Extremely Low Latency Matching Engine Synthesizable IP Core
Axonerve is a next generation variant of the content-addressable memory (CAM) solution.
The CMS0071 ISDB-S3 Demodulator is a high-performance (A)PSK demodulator core intended for ARIB STD-B44 ISDB-S3 wide band digital…
The Commsonic CMS0070 ISDB-S3 Modulator with integrated LDPC encoder has been designed specifically to address the requirements o…
TC1770 is a IoT-optimized turbo decoder Core compliant with LTE Cat-0 / Cat-M (release 12 and release 13).
LTE Channel Estimation IP core
hellaPHY® CE is the industry’s most LTE channel estimation IP core.
IEEE 802.16 WiMAX High Speed 8 State Turbo Decoder
This is a high speed IEEE 802.16 WiMAX 8 state duobinary turbo decoder with four parallel MAP decoders.