Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
Low-power, low-gate-count, highly-configurable DSP core for audio and control processing
TinyCore is a DSP core that supports stream-based processing of time domain audio or control data samples including single cycle …
The function of this core is to correlate an incoming data stream to a stored binary pattern called a code sequence or coefficien…
CORDIC (COordinate Rotation DIgital Computer) is a simple and efficient algorithm to calculate hyperbolic and trigonometric funct…
Cascaded Integrator-Comb (CIC) Filter
Cascaded Integrator-Comb (CIC) filters, also known as Hogenauer filters, are used to achieve arbitrary and large sample rate chan…
The 3GPP LTE Turbo Encoder implements the turbo convolutional encoding scheme defined in the 3GPP LTE specifications.
The 3GPP LTE RACH Detector offers a flexible and optimized implementation of the RACH detection function required for 3GPP-LTE ba…
3GPP LTE Fast Fourier Transform (LTE-FFT)
The LTE FFT LogiCORE™ IP provides support for all transform point sizes defined by the 3GPP-LTE specifications, including the 153…
Peak Cancellation Crest Factor Reduction (PC-CFR)
Xilinx provides a CFR solution for common wireless standards that is low cost, flexible, low power and solves your time to market…
Xilinx provides a DUC/DDC solution for LTE, TD-SCDMA and WCDMA that is low cost, low power and solves your time to market needs.
The Xilinx LogiCORE™ DSP48 Macro provides an easy-to-use interface that abstracts the DSP48 slice and simplifies its dynamic oper…
32/64/128/256/512/1024/2048/4096 Point FFT Core
The FFT4096 core the FFT and IFFT computations for N input samples, where N can be any power of 2 between 32 and 4096 (32, 64, 12…
The CMS0041 DVB-T2 Modulator provides all the necessary processing steps to modulate single transport stream into a complex I/Q s…
The Multiply Adder IP performs a multiplication of two operands and adds (or subtracts) the full-precision product to a third ope…
Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA.
The Multiply Accumulator IP accepts two operands, a multiplier and a multiplicand, and produces a product (A*B=Prod) that is adde…
Included with Xilinx ISE Software The Multiplier Accumulator IP core product is a parallel multiplier accumulator module that per…
The LTE Baseband Platform enables customers to more easily exploit the advantages of a 100% Xilinx FPGA baseband implementation, …
The LTE MIMO Decoder provides LTE basestations developers with a optimized and scalable MIMO decode function.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder
TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications.
Pipelined Floating Point FFT IP Core
The Pipelined FFT IP Core provides efficient continuous data FFT calculations at the rate of one point per clock cycle.