Processor Architecture for High Performance Video Decode
Processor Architecture for High Performance Video Decode
Vendor:
Lattice Semiconductor Corp.
Category:
Filters Transforms
Correlator IP Core
The function of this core is to correlate an incoming data stream to a stored binary pattern called a code sequence or coefficien…
Overview
The function of this core is to correlate an incoming data stream to a stored binary pattern called a code sequence or coefficient sequence. The data stream may be binary or multi-valued, either signed or unsigned, and is provided to the core one sample at a time. The core can be configured to perform either a real correlation with a single data input stream and a single coefficient sequence, or a complex correlation with two input data streams representing the real and imaginary input terms, and two coefficient sequences representing the real and imaginary coefficients. The core provides multiple channel capability and can support up to 256 channels. Correlations for each channel operate independently from each other. Also, up to 256 different coefficient sequences may be stored in the core, and each channel can select which coefficient sequence is correlated to that channel, so one coefficient sequence could be used for all 256 channels if desired.
Key features
- Supports 1 to 8 bit input data width
- Supports 1 to 256 channels
- Supports a correlation window from 8 to 2048 taps
- Supports oversampled input data from 2x to 8x
- Supports real correlations for either signed or unsigned data
- Supports complex correlations for signed data
- Allows the user to tune the performance of the design by specifying the values of several parameters
- Provides a selectable input FIFO for maximum data throughput
- Allows the user to specify the number of coefficient sequences desired, from 1 to 256
Block Diagram
CORR-8BIT block diagram
Specifications
Identity
Part Number
CORR-8BIT
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about Filters Transforms IP core
No size fits all for signal processing on FPGA (RF Engines)
No size fits all for signal processing on FPGA (RF Engines)
Employing general-purpose processors for radio DSP
Employing general-purpose processors for radio DSP
Do's and Don'ts of Architecting the Right FPGA Solution for DSP Design
Finally a Practical ''Do and Don't'' primer on architecting FPGA solutions for DSP design. With more do's than don’ts, the article is a down-to-basics look at how to avoid the pitfalls and realize device benefits
10 FPGA Design Techniques You Should Know
Regardless of whether you are using VHDL, System Verilog, or a different design capture language, there are a number of universal design techniques with which FPGA engineers should be familiar, from the very simple to the most advanced.
How to implement double-precision floating-point on FPGAs
The real results of a double-precision matrix multiply core that can easily be extended to a full DGEMM benchmark are demonstrated.
Frequently asked questions about Filters and Transforms IP cores
What is Correlator IP Core?
Correlator IP Core is a Filters Transforms IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.
How should engineers evaluate this Filters Transforms?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.