Overview
The function of this core is to correlate an incoming data stream to a stored binary pattern called a code sequence or coefficient sequence. The data stream may be binary or multi-valued, either signed or unsigned, and is provided to the core one sample at a time. The core can be configured to perform either a real correlation with a single data input stream and a single coefficient sequence, or a complex correlation with two input data streams representing the real and imaginary input terms, and two coefficient sequences representing the real and imaginary coefficients. The core provides multiple channel capability and can support up to 256 channels. Correlations for each channel operate independently from each other. Also, up to 256 different coefficient sequences may be stored in the core, and each channel can select which coefficient sequence is correlated to that channel, so one coefficient sequence could be used for all 256 channels if desired.
Learn more about Filters Transforms IP core
Combining Arm® AGI CPU server platforms with Lattice FPGAs and AMI firmware creates a solution that provides advanced security, manageability, connectivity, and flexibility for next-generation AI data center infrastructure.
Lattice Prompt pairs with AI agentic tools developers already use, combining them with Lattice design tools, knowledge base, and documentation to turn natural language inputs into validated responses, dramatically accelerating FPGA development while optimizing design performance and capability.
First announced on May 4, 2026, the acquisition creates the industry's most complete secure management and control platform.
The acquisition brings together Lattice’s industry-leading low power FPGAs with AMI’s industry‑leading platform firmware and infrastructure manageability solutions for cloud and AI to create a complete portfolio of secure management and control solutions.
The collaboration demonstrates a real-time AI sensor fusion architecture that integrates TI mmWave radar and camera sensors using NVIDIA Holoscan Sensor Bridge running on Lattice’s low power FPGA. The FPGA acts as a companion chip delivering synchronized sensor data directly into GPU-accessible memory to enable low-latency and robust perception for robotics and industrial edge AI applications.
Sets new standard for secure control FPGAs with full CNSA 2.0-compliant post-quantum cryptography, crypto-agility, and hardware Root of Trust for next-generation infrastructure
