Processor Architecture for High Performance Video Decode
Processor Architecture for High Performance Video Decode
Vendor:
Xilinx, Inc.
Category:
Filters Transforms
Digital Pre-Distortion (DPD)
Xilinx provides a market DPD solution that reduces CapEx and OpEx Digital Pre-Distortion (DPD) is one of the most fundamental bui…
Overview
Xilinx provides a market leading DPD solution that reduces CapEx and OpEx
Digital Pre-Distortion (DPD) is one of the most fundamental building blocks in wireless communication systems today. It is used to increase the efficiency of Power Amplifiers. By reducing the distortion created by running Power Amplifiers in their non-linear regions, Power Amplifiers can be made to be far more efficient. Wireless base stations not employing CFR or DPD algorithms typically exhibit low efficiency, and therefore high operational and capital equipment costs. A typical Class AB LDMOS Power Amplifier with WCDMA waveforms may have approximately 8-15% efficiency. With CFR and DPD turned on, this efficiency can grow to as much as 30-40%, resulting in tremendous savings in CapEx and OpEx for network operators. With later generations of Power Amplifier design leveraging Doherty architectures, efficiencies in the 40%+ range with Xilinx DPD are possible.
The Xilinx DPD core reduces implementation time by providing a high performance DPD solution to customers as a parameterizable core rather than one that needs to be customized by hand. Furthermore, Xilinx DPD is tuned for implementation in Xilinx FPGAs, resulting in a very small FPGA footprint and the lowest cost FPGA solution available today.
Xilinx DPD v8.0 supports the following air interface standards:
* LTE FDD/TDD
* LTE/LTE-Advanced
* TD-SCDMA
* WCDMA
* WiMAX
* CDMA2000
* MC-GSM
Digital Pre-Distortion (DPD) is one of the most fundamental building blocks in wireless communication systems today. It is used to increase the efficiency of Power Amplifiers. By reducing the distortion created by running Power Amplifiers in their non-linear regions, Power Amplifiers can be made to be far more efficient. Wireless base stations not employing CFR or DPD algorithms typically exhibit low efficiency, and therefore high operational and capital equipment costs. A typical Class AB LDMOS Power Amplifier with WCDMA waveforms may have approximately 8-15% efficiency. With CFR and DPD turned on, this efficiency can grow to as much as 30-40%, resulting in tremendous savings in CapEx and OpEx for network operators. With later generations of Power Amplifier design leveraging Doherty architectures, efficiencies in the 40%+ range with Xilinx DPD are possible.
The Xilinx DPD core reduces implementation time by providing a high performance DPD solution to customers as a parameterizable core rather than one that needs to be customized by hand. Furthermore, Xilinx DPD is tuned for implementation in Xilinx FPGAs, resulting in a very small FPGA footprint and the lowest cost FPGA solution available today.
Xilinx DPD v8.0 supports the following air interface standards:
* LTE FDD/TDD
* LTE/LTE-Advanced
* TD-SCDMA
* WCDMA
* WiMAX
* CDMA2000
* MC-GSM
Key features
- LTE FDD/TDD
- LTE/LTE-Advanced
- TD-SCDMA
- WCDMA
- WiMAX
- CDMA2000
- MC-GSM
Specifications
Identity
Part Number
EF-DI-DPD-SITE
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about Filters and Transforms IP cores
What is Digital Pre-Distortion (DPD)?
Digital Pre-Distortion (DPD) is a Filters Transforms IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this Filters Transforms?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.