Vendor: Xilinx, Inc. Category: Channel Coding

Aurora 8B/10B

Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA.

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Overview

Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA.

Aurora is a LogiCORE IP designed to enable easy implementation of Xilinx transceivers while providing a light-weight user interface on top of which designers can build a serial link. Aurora 8B/10B is a scalable, lightweight, link-layer protocol for high-speed serial communication. The protocol specification is open and available upon request. The IP is free from the IP Catalog on Xilinx silicon devices.

Aurora is typically used in applications where other industry standard serial interfaces are not needed and Aurora delivers low-cost, high data-rate, scalable and flexible means to build a serial data channel. Its simple framing structure can easily be used to encapsulate data from existing protocols, and its electrical requirements are compatible with commodity equipment. Aurora can be used to provide increased performance without high FPGA resource costs, software redevelopment, or exotic physical infrastructure.

Key features

  • Chip-to-chip links. Significantly reduce the trace count on PCBs with minimal FPGA resource costs. Examples: Line cards, multi-device partitioning, high-speed ASIC-FPGA connections
  • Board-to-board and backplane links. Increase system throughput using existing cables, connectors, and backplanes. Examples: Short-reach optics, ATCA Backplanes
  • Streaming data applications. Infinite frames with arbitrary Idle insertion make it easy to stream data through Aurora channels. Examples: Data cell transfer with low overhead, Video streams
  • One-way connections. Aurora simplex channels enable low cost, high-speed serial links in a single direction. Examples: Video data offload, long-haul data transfer

Specifications

Identity

Part Number
Aurora 8B/10B
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

Audio Transport in DisplayPort VIP

DisplayPort uses Secondary Data Packets (SDPs), which are transported over the Main-Link that are not main video stream data. This allows it to carry audio and video simultaneously. The VIP supports audio transmission both in the original mode as defined in the specification as well as just as any other SDP being transmitted.

Frequently asked questions about Channel Coding IP cores

What is Aurora 8B/10B?

Aurora 8B/10B is a Channel Coding IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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