Vendor: TurboConcept Category: Channel Coding

China Multimedia Mobile Broadcasting (CMMB) LDPC decoder

TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications.

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Overview

TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications. The Core is a stand-alone module, with no external memory needs. It is available for mainstream FPGA or ASIC device targets. Two throughput levels are proposed (*):

  • low-complexity Core : 75 Mbps
  • high-throughput Core : 150 Mbps
    (*) Throughput depends on the selected device and vary with the number of iterations.

Key features

  • Compliant with China Multimedia Mobile Broadcasting (CMMB) specifications
    • Block size 9216 bits
    • Code rate 1/2 and 3/4
  • Near floating point error correction performance
  • Early iteration stopping feature
  • Patented architecture allowing high throughput for reduced footprint
  • On-the-fly change of code rate and number of iterations
  • Low latency
  • Single FPGA Core (no external memory required), available on all popular Xilinx, Altera and Lattice devices
  • ASIC Core : Verilog or VHDL RTL Core delivery
  • Encoder available for decoder validation

Specifications

Identity

Part Number
TC4300
Vendor
TurboConcept
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

TurboConcept
HQ: FRANCE
Contact TurboConcept

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Frequently asked questions about Channel Coding IP cores

What is China Multimedia Mobile Broadcasting (CMMB) LDPC decoder?

China Multimedia Mobile Broadcasting (CMMB) LDPC decoder is a Channel Coding IP core from TurboConcept listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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