Vendor: Lorentis Electronics Category: Channel Coding

LDPC Forward Error Correction

High-reliability decoding that repairs corrupted bits on noisy links and performs close to the theoretical limit.

LDPC View all specifications

Overview

High-reliability decoding that repairs corrupted bits on noisy links and performs close to the theoretical limit.

Parameter Description
Data AXI4-Stream (soft LLR in, bits out)
Control AXI4-Lite registers
Devices AMD 7-series · UltraScale+ · Altera
Model Bit-accurate C / MATLAB

Key features

  • Iterative belief-propagation (layered min-sum) decoding
  • Configurable code rates and block sizes
  • Early termination on syndrome check
  • Encoder and decoder available separately
  • Low-latency, FPGA-optimized architecture

Block Diagram

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Specifications

Identity

Part Number
LDPC FEC
Vendor
Lorentis Electronics
Type
Silicon IP
Algorithm
LDPC

Provider

Lorentis Electronics
HQ: Türkiye

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

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Frequently asked questions about Channel Coding IP cores

What is LDPC Forward Error Correction?

LDPC Forward Error Correction is a Channel Coding IP core from Lorentis Electronics listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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