DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.
- Controller + PHY + 1
- LPDDR4
- TSMC
- 28nm
- HPC+
- In Production
DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2).
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
With compatibility for PIPE 4.4 interface protocol, this Peripheral Component Interconnect Express (PCIe) x4 PHY complies with PC…
DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
The Combo PHY is a USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process.
USB 2.0 PHY IP, Silicon Proven in TSMC 40LP/LL
The USB2.0 PHY IP is an entire physical layer (PHY) IP solution built for high performance and low power consumption.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 55ULP/65ULP
The PCIe2.0 PHY IP is a physical layer (PHY) IP solution designed for mobile and consumer applications.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP/ULL
The PCIe2.0 PHY IP is an all-in-one physical layer (PHY) IP solution for mobile and consumer applications.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
The PCIe2.0 PHY IP is a fully - featured physical layer (PHY) IP solution for mobile and consumer applications.
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
This Display Port v1.4 Rx PHY IP Core supports Channel capacity, offering programmable analog characteristics like CDR Bandwidth,…
USB 3.0 PHY IP, Silicon Proven in TSMC 28HPC+
A Universal Serial Bus (USB) transceiver which is provided for peripheral devices.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 4.0 Base Specification with support of PIPE 4…
USB 2.0 PHY IP, Silicon Proven in TSMC 28HPC+
The USB2.0 PHY IP is an entire physical layer (PHY) IP solution built for high performance and low power consumption.
Connectivity Solutions With Our NFC Tag IP in 22 nm CMOS Our NFC tag IP integrates seamlessly with ISO 14443-A, 14443-B, and 1569…
1.8V/3.3V Switchable GPIO with I2C, HDMI, LVDS, ESD & Analog in TSMC 28nm
A TSMC 28nm HPM/HPC/HPC+ Wirebond I/O Library with a switchable 1.8V/3.3V GPIO, 5V I2C ODIO, 1.8V & 3.3V Analog Cells, ESD and mo…
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR B…
MIPI M-PHY v3.1 IP, Silicon Proven in TSMC 28HPC+
The MIPI M-PHY Gear 3 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3…
MIPI D-PHY Tx IP, Silicon Proven in UMC 55LP
Version 1.2 of the D-PHY specification is completely complied with by the MIPI D-PHY Analog TX IP Core.