Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
Key Value Store/Exact Match Search Engine
The Ultra-Low-Latency (ULL) Exact Match Search Engine (EMSE) IP is latency-optimized Key-Value Store (KVS) system for Accelerated…
The LCE02C is a high speed encoder for the CCSDS telemetry (TM) accumulate, repeat by four, jagged accumulate (AR4JA) low density…
CCSDS Rate 1/2 TC and TM LDPC Decoder
The LCD03C is a low complexity decoder for the CCSDS rate 1/2 telecommand (TC) and telemetry (TM) low density parity check (LDPC)…
CCSDS Rate 1/2 TC and TM LDPC Encoder
The LCE03C is a low complexity encoder for the CCSDS rate 1/2 telecommand (TC) and telemetry (TM) low density parity check (LDPC)…
Power and area optimised Bitcoin miner engine
The eSi-BTC core is a Bitcoin miner engine that perform double SHA256 Hash.
The demand for high-speed data connection services develops in tandem with the number of internet users and multimedia apps.
multiple users and data streams must be processed concurrently in a contemporary communication system based on existing 4G and fu…
Quadrature Amplitude Modulation: Modulator and Demodulator
QAM Modulator and Demodulator combine two amplitude modulation signals into a single data transfer channel: 1.
Crest Factor Reduction IP Core
Crest Factor Reduction (CFR) is a technique for lowering a waveform’s power ratio from higher to average.
Digital Predistortion (DPD) IP Core
The next fifth-generation (5G) wireless networks promise connection speeds and data rates that are 100 times faster than current …
Versatile, Ultra-Low-Power DSP for Audio, Voice, Vision, and AI
Smallest, ultra-low-energy DSP for always-on sensor fusion, always-listening voice trigger, and Bluetooth/BLE codecs The Cadence®…
The LDPC Error Correction Core (Alcyone) delivers industry- error correction performance to enable 2D/3D, SLC/MLC/TLC/QLC NAND Fl…
CCSDS turbo encoder with sync marker, pseudo randomiser and input memory
This is a high speed 16 state CCSDS compatible parallel concatenated turbo encoder with sync marker, optional pseudo-randomiser a…
CCSDS turbo decoder with sync marker synchroniser, descrambler and input memory
This is a CCSDS compatible 16 state error control turbo decoder with optional synchronisation, optional descrambling and input me…
The second generation SiFive® Intelligence™ X390 is an 8-stage dual issue, in-order, superscalar processor with dual vector proce…
DVB-S2X NarrowBand Demodulator & Decoder IP (Silicon Proven)
This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to…
DVB-S2/DVB-S2X Demapper/LDPC/BCH Decoder
The LCD01D is a high speed decoder for the DVB-S2/DVB-S2X low density parity check (LDPC) and Bose, Chaudhuri and Hocquenghem (BC…
The IS-GPS-800D standard defines an irregular Parity Check Matrix (PCM) for 2 subframes (2 and 3) encoded using Low Density Parit…
The BCH decoder has four main functional blocks along with memory blocks.
High performance Linux capable vector processor
The SiFive Intelligence VIU75 Standard Core is a single-core instantiation of our RISC-V application processor with vector extens…