Vendor: Sifive, Inc. Category: CPU

8-stage dual issue, in-order, superscalar processor with dual vector processing units (1024-bit VLEN/512-bit DLEN)

The second generation SiFive® Intelligence™ X390 is an 8-stage dual issue, in-order, superscalar processor with dual vector proce…

Overview

The second generation SiFive® Intelligence™ X390 is an 8-stage dual issue, in-order, superscalar processor with dual vector processing units. It scales to a 4-core cache-coherent complex with optional SiFive Scalar Coprocessor Interface (SSCI) and Vector Coprocessor Interface eXtensions (VCIX) for close coupling with customer-designed external AI accelerators or other coprocessors.

The X390 Gen 2 introduces an efficient memory subsystem, configurable load queues to hide memory latency and targeted instructions for speeding up AI/ML workloads. The X390 Gen 2 delivers 4x compute and 32x data throughput compared to the popular X280 Gen 1, while enabling up to 1TB/s data bandwidth in a four-core configuration.

Use X390 as a standalone edge AI processor or as an Accelerator Control Unit, with your custom accelerator, to perform control and assist functions and simplify the software stack.

Key features

  • New in Second Generation 
    • New RVA23 support 
    • New RVV1.0 512-bit vector engine 
    • New SSCI interface added alongside VCIX 
    • New instructions and extensions 
    • New improved memory subsystem 
    • New memory latency tolerance
    • New HW support of BF16 datatype 
    • New vector crypto support
    • Plus many other new features, enhancements and upgrades
  • RISC-V Vector extension supported
  • Up to 1024-bit VLEN Dual Vector ALU
  • 512-bit DLEN
  • SiFive Intelligence Extensions for ML workloads
    • New hardware accelerated Exponential Instructions
    • Custom instructions to greatly accelerate Neural Network computation
    • Optimized neural network libraries and Open XLA support
  • 1024-bit vector register length processor
    • Variable length operations, up to 512-bits of data per cycle
    • Ideal balance of control logic and data parallel compute
    • Decoupled Vector pipeline
    • INT8 to INT64 integer data type
    • BF16/FP16/FP32/FP64 floating point data type
  • Built on silicon-proven U7-Series core
    • 64-bit RISC-V ISA
    • 8-stage dual-issue in-order pipeline
    • Coherent multi-core, Linux capable
  • High performance vector memory subsystem
    • Shared L2 Cache architecture optimized for vector compute
    • Dedicated uncached data movement port
  • Multi-core processor configuration, up to 4 cores
  • SSCI and VCIX specialized interfaces for close coupling with customer-designed external AI accelerators or other coprocessors 
    • SiFive Scalar Coprocessor Interface (SSCI) to issue custom instructions to accelerators for optimum scheduling at lower latency  
    • Vector Coprocessor Interface eXtensions (VCIX) allowing custom vector instructions to be executed on the accelerator at high bandwidth from the vector pipeline 

Block Diagram

What’s Included?

  • RTL Evaluation
  • Test Bench RTL
  • Software Development Kit
  • FPGA Bitstream
  • Documentation

Specifications

Identity

Part Number
Intelligence X390 Gen 2
Vendor
Sifive, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

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Frequently asked questions about CPU IP cores

What is 8-stage dual issue, in-order, superscalar processor with dual vector processing units (1024-bit VLEN/512-bit DLEN)?

8-stage dual issue, in-order, superscalar processor with dual vector processing units (1024-bit VLEN/512-bit DLEN) is a CPU IP core from Sifive, Inc. listed on Semi IP Hub.

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