DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel® FPGA IP
The DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel FPGA Intellectual Property (IP) provides simplified interfaces to industry…
DDR and DDR2 SDRAM Controller Intel® FPGA IP Core
The DDR and DDR2 SDRAM controllers handle the complex aspects of using DDR and DDR2 SDRAM—initializing the memory devices, managi…
SDRAM Controller DO-254 IP Core
The SDRAM Controller implements a controller for Single Data Rate Synchronous Dynamic Random Access Memory (SDR SDRAM) devices as…
A Lattice FPGA based LPDDR3 solution – The Lattice Low Power Double Data Rate (LPDDR3) Synchronous Dynamic Random Access Memory (…
The LPDDR Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller that interfaces with…
The Lattice Double Data Rate (DDR3) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory contr…
DDR SDRAM Controller - Pipelined for ispXPGA and ORCA4
DDR (Double Data Rate) SDRAM was introduced as a replacement for SDRAM memory running at bus speeds over 75MHz.
DDR SDRAM Controller - Non-Pipelined
This version of the Lattice DDR SDRAM Controller does not have pipelining, and is significantly smaller than the pipelined versio…
DDR2 SDRAM Controller - Pipelined
The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…
DDR SDRAM Controller - Pipelined
The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…
AMBA AHB Bus to DDR SDRAM Controller
AMBA AHB Bus to DDR SDRAM Controller
DDR3 SDRAM Controller IP with advance feautures package
DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or highe…
DDR2 interface provides full support for the DDR2 interface, compatible with JESD79-2F specification and DFI-version 2.0 or highe…
DDR3 SDRAM Controller IP Core Pinout Utility
Overview The DDR3 Pinout Generation Utility is a GUI tool that is capable of generating the pinout and preference files that cont…
DDR/DDR2 SDRAM Controller MACO Core
The DDR/DDR2 Synchronous Dynamic Random Access Memory (SDRAM) Controller MACO Core is a general-purpose memory controller that in…
Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 2…
Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 2…
DDR3 SDRAM Controller
DDR2 SDRAM Controller
AHB system Peripheral IP, SDRAM controller, Soft IP
Synchronous DRAM controller with AHB interface.