Vendor: Lattice Semiconductor Corp. Category: DDR

DDR2 SDRAM Controller - Pipelined

The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…

Controller DDR2 View all specifications

Overview

The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller that interfaces with industry standard DDR2 SDRAM. The memory controller provides a generic command interface to the user's application. This interface reduces the effort to integrate the module with the remainder of the application and minimizes the need to deal with the DDR2 SDRAM command interface. The timing parameters for the memory can be set through the signals that are input to the core as part of the configuration interface. This enables switching between different memory devices and modification of timing parameters to suit the application using the same netlist.

Key features

  • Interfaces to Industry Standard DDR2 SDRAM
  • High-Performance DDR2 533/400/333/266/200/133 operation
  • Programmable Burst Lengths of 4 or 8
  • Programmable CAS Latency of 3, 4, 5 or 6 Cycles
  • Intelligent Bank Management to Minimize ACTIVE Commands
  • Supports All Standard DDR Commands
  • Synchronous Implementation for Reliable Operation
  • Command Pipeline to Maximize Throughput
  • Up to 4 chip selects for multiple DIMM support
  • Supports all Common Memory Configurations
    • SDRAM data path widths of 8, 16, 32, 64 and 72 bits
    • Variable address widths for different memory devices
    • Programmable timing parameters
    • Byte level writing through Data Mask signals
    • Burst termination

Block Diagram

Specifications

Identity

Part Number
DDR2-P
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP
Controller / PHY
Controller

Standards & Interfaces

Memory
DDR2

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DDR IP core

DDR3 memory interface controller IP speeds data processing applications

In order to fully capitalize on the benefits of DDR3 memories, it is important to have an efficient and easy to use DDR3 memory interface controller. A video processing application provides a good example of the key requirements of a DDR3 memory system and the features needed from a DDR3 Interface in similar stream-oriented data processing systems.

Microcontroller Design in FPGAs

The union of Microcontroller Unit (MCU) intellectual property (IP) cores with FPGAs provides a far more flexible hardware platform than traditional MCU ASSPs.

Frequently asked questions about DDR Interface IP

What is DDR2 SDRAM Controller - Pipelined?

DDR2 SDRAM Controller - Pipelined is a DDR IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this DDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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