Vendor: Faraday Technology Category: DLL

Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process.

Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 2…

Overview

Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process.

Silicon Options

Foundry Node Process Maturity
UMC 28nm 28nm 280 nm —

Specifications

Identity

Part Number
FXADDLL340HJ0C
Vendor
Faraday Technology
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DLL IP core

Faraday Reports First Quarter 2026 Results

First quarter consolidated revenues were NT$2,589 million, down 8% QoQ and 65% YoY. Gross profit was NT$1,225 million, up 3% QoQ but down 19% YoY, with gross margin reached 47.3%.

Frequently asked questions about DLL IP cores

What is Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process.?

Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process. is a DLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc.

How should engineers evaluate this DLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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