Universal Chiplet Interconnect Express(UCIe) VIP
The UCIe VIP , a solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of y…
- Verification IP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Universal Chiplet Interconnect Express(UCIe) VIP
The UCIe VIP , a solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of y…
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-C…
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-C…
DDR5 Serial Presence Detect (SPD) Hub Interface
The SPD5 Hub Function IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temper…
MIPI CSI -2 TRANSMITTER IP -V3
MIPI CSI-2 (Camera Serial Interface) Transmitter IP defines an interface between a peripheral device (camera) and host processor …
MIPI CSI-2 V3 RECEIVER INTERFACE IP
The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (applicatio…
MIPI-I3C Slave (SDR) RTL Design IP
MIPI I3C slave Controller IP Core is fully compliant with the latest I3C specification and delivers high bandwidth and scalabilit…
MIPI-I3C Master (SDR) RTL Design IP
MIPI I3C master Controller IP Core is fully compliant with the latest I3C specification and delivers high bandwidth and scalabili…
MIPI I3C Basic Slave Controller
MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication.
MIPI I3C Basic Master Controller
MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication.
The UCIe IP solution includes D2D Adapter layer which supports streaming/PCIe/CXL/Raw flitformats, supports both standard and mai…
Low Pin Count (LPC) controller verification IP
The Low Pin Count (LPC) interface is a low bandwidth bus with up to 33 MHz performance.
The vendor provides configurable GDDR6 verification IP.
The TS5111 and TS5110 device incorporate thermal sensing capability which is controlled and read over two wire bus.
The vendor provides configurable CPRI TX/RX verification IP.
Hierarchical scalability is the foundation principle of the Fibonacci machine-learning (ML) system-on-chip (SoC).
Ultra-low-power 60 GHz radar-on-chip
Short-range radar has many potential applications, such as gesture control, contactless vital-signs monitoring, presence detectio…
APB to AHB-Lite Asynchronous Bridge
The APB to AHB-Lite Asynchronous Bridge translates an APB bus transaction (read or write) on one clock domain to an AHB Lite bus …
The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction.
The AHB SRAM Controller provides a standard AHB interface to translate AHB bus reads and writes into reads and writes with the si…