Vendor: Silvaco, Inc. Category: Protocol Bridge

APB to AHB-Lite Asynchronous Bridge

The APB to AHB-Lite Asynchronous Bridge translates an APB bus transaction (read or write) on one clock domain to an AHB Lite bus …

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Overview

The APB to AHB-Lite Asynchronous Bridge translates an APB bus transaction (read or write) on one clock domain to an AHB Lite bus transaction on a second (asynchronous) clock domain. This allows two completely independent AHB-Lite systems to communicate and share data. The bridge is implemented as two state machines - one on the initial or “A” domain and another on the secondary or “B” domain, and several synchronizers. The APB to AHB-Lite Asynchronous Bridge acts as an APB Slave component on the “A” domain, and an AHB-Lite Master component on the “B” domain.

Key features

  • Translates AMBA® APB transactions to AMBA® AHB Lite transactions
  • Interfaces two totally asynchronous APB and AHB-Lite domains
  • Supports any ratio of relative clock frequencies
  • Low Gate Count
  • Conforms to APB and AHB-Lite signaling rules

Block Diagram

APB to AHB-Lite Asynchronous Bridge block diagram

What’s Included?

  • Verilog Source
    Complete Test Environment
    Bus Functional Model

Specifications

Identity

Part Number
APB to AHB-Lite Asynchronous Bridge
Vendor
Silvaco, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Silvaco, Inc.
HQ: United States
Contact Silvaco, Inc.

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Frequently asked questions about Protocol Bridge IP cores

What is APB to AHB-Lite Asynchronous Bridge?

APB to AHB-Lite Asynchronous Bridge is a Protocol Bridge IP core from Silvaco, Inc. listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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