Vendor: Silvaco, Inc. Category: Protocol Bridge

AHB Lite to AXI Bridge

The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction.

Overview

The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and the AHB clock are derived from the same clock source, and that the period of the AHB Lite clock is an integer multiple of the AXI clock in the range [1,16].

Logic on two synchronous clock domains is used to accomplish the translation.

The AHB Lite logic is responsible for responding to transaction requests from the AHB Lite, and for generating AXI transactions based on transaction information from the AHB logic, and for presenting read data from the AXI subsystem back to the AHB Lite Master component.

The AXI logic is responsible for generating AXI transactions based on transaction information from the AHB Lite logic, and for pacing the AXI transaction based on internal FIFO levels and on responses from the AXI Slave component peripheral.

The AHB Lite to AXI Bridge acts as an AHB Lite Slave component, and an AXI Master component in an AXI/AHB subsystem. Typically, the AHB Lite to AXI Bridge has its AHB Lite interface connected to a Slave component port on an AHB Lite Channel/Interconnect module, and its AXI interface connected to the Master component port on an AXI Channel module.

Key features

  • Converts AHBLite Controller transactions to AXI Master transactions
  • Pseudo-synchronous clock domains
  • FIFOs for Buffering

Block Diagram

What’s Included?

  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model

Specifications

Identity

Part Number
70145
Vendor
Silvaco, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: United States

Learn more about Protocol Bridge IP core

Silvaco to Accelerate Physics-Based Digital Twins for Semiconductor Design and Manufacturing Using NVIDIA AI and Accelerated Computing

Silvaco is combining decades of physics-based modeling expertise with NVIDIA’s accelerated computing, CUDA-X™ libraries, PhysicsNeMo, Omniverse libraries, and Nemotron open models to help customers build, train, and deploy high-fidelity digital twins capable of predicting, optimizing, and validating complex semiconductor systems with unprecedented speed and accuracy.

Silvaco Reports Fourth Quarter and Full-Year 2025 Financial Results

Secured second artificial intelligence-driven machine learning (AI/ML) FTCO™ customer, driving revenue above high end of guided range. Executing cost reduction strategies ahead of expectations, resulting in operating expenses below midpoint of guided range. Q4’25 operating loss less than anticipated and cash burn, excluding one-time items, to reduce dramatically in Q1’26

Frequently asked questions about Protocol Bridge IP cores

What is AHB Lite to AXI Bridge?

AHB Lite to AXI Bridge is a Protocol Bridge IP core from Silvaco, Inc. listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP