Vendor: MAXVY Technologies Pvt Ltd Category: I2C / I3C

DDR5 Serial Presence Detect (SPD) Hub Interface

The SPD5 Hub Function IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temper…

Overview

The SPD5 Hub Function IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temperature Sensor(TS), from master host bus. This SPD5 has Two wire serial interface like SCL, SDA.

Key features

  • Compliance as per JEDEC’s JESD300-5
  • Upto 12.5MHz speed supported
  • Bus Reset
  • SDA arbitration
  • Parity Check is enabled
  • Packet Error Check is supported (PEC)
  • Supported Switch from I2C to I3C Basic Mode and vice versa
  • Default Read address pointer Mode supported
  • Support SPD5 Hub write and read operations with or without PEC enabled
  • In-band Interrupt (IBI)
  • Support Write Protection for each block of NVM memory
  • Interrupt Arbitration
    • Among SPD5 Hub Devices
    • Local Target Devices behind one SPD5 Hub Devices
    • Between SPD5 Hub Device and Local Target Devices Behind the Hub
    • Among Local Target Devices behind Different SPD5 Hub Devices
    • Between Host and Any SPD5 Hub or Any Local Target Devices Behind Hub
  • Clearing Device Status and IBI Status Registers
  • Packet Error Check & Parity Error Handling
  • CCC Packet Error Handling
  • I3C Basic Common Command Codes (CCC)
    • ENEC
    • DISEC
    • RSTDAA
    • SETAASA
    • GETSTATUS
    • DEVCAP
    • SETHID
    • DEVCTRL
  • Dynamic IO Operation Mode Switching
  • Bus Clear and Bus Reset
  • SPD5 Command
    • NVM memory
      • W1M, R1M
      • W2M, R2M
      • W4M, R4M
      • W16M, R16M
    • Register Space
      • W1R, R1R
      • W2R, R2R
      • W16R, R16R
    • NVM memory Write and Read access
    • Offline Tester operation is supported

Block Diagram

SPD5 Hub Interface IP block diagram

What’s Included?

  • Verilog Source code
  • User Guide
  • IP Integration Guide
  • Simulation Script
  • Synthesis Script
  • Encrypted UVM Verification Environment
  • cocotb Verification Environment
  • Basic Testsuite
  • Firmware code

Specifications

Identity

Part Number
SPD5 Hub Interface IP
Vendor
MAXVY Technologies Pvt Ltd
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about I2C / I3C IP cores

What is DDR5 Serial Presence Detect (SPD) Hub Interface?

DDR5 Serial Presence Detect (SPD) Hub Interface is a I2C / I3C IP core from MAXVY Technologies Pvt Ltd listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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