High-performance and low-power 3D graphics IP core
High-performance and low-power 3D graphics IP core for embedded devices.
- GPU
- Silicon Proven
- Now
- OpenVG 1.1
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
High-performance and low-power 3D graphics IP core
High-performance and low-power 3D graphics IP core for embedded devices.
64x1 Bits OTP (One-Time Programmable) IP, TSMC 0.18um SiGe BiCMOS 1.8V/3.3V General Purpose Process
The ATO00064X1TS180SGE3NA is organized as a 64-bit by 1 one-time programmable (OTP).
128x16 Bits OTP (One-Time Programmable) IP, DBHitek 0.13um BCD Process Platforms
The ATO0128X16DB130BSA3NA is organized as a 128x16 one-time programmable (OTP).
256x1 Bits OTP (One-Time Programmable) IP, VIS 110 nm 1.2V/5.0V BCD Process
The AT256X1V110BCD0AA is organized as 256 bits by 1 one-time programmable in 1-bit read and 1-bit program modes.
16x8 Bits OTP (One-Time Programmable) IP, VIS 150nm 1.8V BCD Process
The ATO00016X8VI150BG22NA is organized as 16 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.
4Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/6V SOI BCD EPI Process
The ATO0004KX8VI150SOI3XX00A is organized as a 4K-bits by 8 one-time programmable.
16x8 Bits OTP (One-Time Programmable) IP, TSMC CM018G 0.18um 1.8V/3.3V Process
The ATO00016X8TS180CMG3NA is organized as 16 bits by 8 one-time programmable (OTP) in 8-bit read and 1-bit program modes.
4Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/5V BCD GIII Process
The AT4K8V150BCD0AB is organized as a 4K-bits by 8 one-time programmable.
104x1 Bits OTP (One-Time Programmable) IP, VIS 0.15um 1.8V/6V BCD G2 EPI Process
The ATO00104X1VI150BIO2N2B is organized as a 104-bit by 1 one-time programmable (OTP).
32x8 Bits OTP (One-Time Programmable) IP, VIS 0.25um 2.5V/3.3V Mixed Signal Process
The ATO00032X8VI250MS03NA is organized as a 32-bit by 8 one-time programmable (OTP).
128x8 Bits OTP (One-Time Programmable) IP, SMIC 0.18µm 1.8V/3.3V Mixed Signal Process
The AT128X8Z180MH0AA is organized as a 128-bit by 8 one-time programmable (OTP).
The AT256X16Z110LL0AA is organized as 256 bits by 16 one-time programmable in 16-bit read and 1-bit program modes.
4Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NB is organized as a 4K-bits by 8 one-time programmable.
128x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal HE Process
The AT128X8Z110LL0AA is organized as 128 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.
512x1 Bits OTP (One-Time Programmable) IP, VIS 0.15um BCD Generation-2 Process
The ATO00512X1VI150B252NA is organized as a 512-bit by 1 one-time programmable (OTP).
The ATO00512X8TJ180SBC4NA is organized as 512 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.
512x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal Generic Process
The AT512X8Z110LLSAA is organized as 512 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.
8Kx8 Bits OTP (One-Time Programmable) IP, X-FAB 0.18um XH018 Modular Mixed Signal Process
The ATO0008KX8XH180TG34DA is organized as an 8K-bits by 8 one-time programmable memory.
4Kx8 Bits OTP (One-Time Programmable) IP, TSMC 0.18µm 1.8V/5V Mixed-Signal Process
The ATO0004KX8TS180MSS3NA is organized as a 4Kx8 one-time programmable in parallel mode.
32x8 Bits OTP (One-Time Programmable) IP, TSMC 0.18um Mixed-Signal 1.8V/3.3V Process
The ATO00032X8TS180GS33NA is organized as 32x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes.