The DB1810 Color Space Converter IP Core transforms three color components from one color space to another.
- Image Conversion
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The DB1810 Color Space Converter IP Core transforms three color components from one color space to another.
SPI Controller IP- Master/ Slave, Parameterized FIFO, Avalon Bus
The Digital Blocks DB-SPI-MS-AVLN is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting both Master/Slave …
SPI Slave IP transfers to/from a AMBA APB, AXI, or AHB Interconnect
The DB-SPI-S-AMBA-BRIDGE is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting only Slave SPI Bus transfer…
I2C Controller IP – Slave, Parameterized FIFO, Avalon Bus
The DB-I2C-S-AHB Controller IP Core interfaces a NIOS II, ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via th…
I2C Controller IP – Master, Parameterized FIFO, Avalon Bus
The DB-I2C-M-AVLN Controller IP Core interfaces a microprocessor via the Avalon Bus to an I2C Bus.
The DB-I2C-SMBus-MS-AMBA Controller IP Core is an I2C/SMBus Master/Slave Controller, interfacing a microprocessor via the AMBA AX…
I2C Controller IP- Master / Slave, Parameterized FIFO, Avalon Bus
The DB-I2C-MS-AVLN Controller IP Core interfaces a microprocessor via the Avalon Bus to an I2C Bus in Standard-Mode (100 Kbit/s) …
I3C Controller IP – I3C / I2C Slave, Configure User Registers, no CPU Host Required
The DB-I3C-S-REG is an I3C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs requiring the configuration…
I3C Controller IP – I3C / I2C Slave, SCL Clock only, Configure User Registers, no CPU Host Required
The DB-I3C-S-SCL-CLK-REG is an I3C Slave Controller IP Core focused on low power, low noise, low VLSI footprint ASIC / ASSP desig…
BitBLT Graphics Hardware Accelerator (Avalon Bus)
The DB9100AVLN BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comma…
2D Graphics Hardware Accelerator (AHB Bus)
The Digital Blocks DB9200AHB 2D Graphics Hardware Accelerator Verilog IP Core renders graphics frames as follows: Generates bitma…
2D Graphics Hardware Accelerator (AXI Bus)
The Digital Blocks DB9200AXI 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Genera…
Display Controller – Ultra HD LCD / OLED Panels (AXI4/AXI Bus)
The DB9000AXI4-UHD LCD Controller IP Core interfaces a video image in frame buffer memory via the AMBA 3.0 / 4.0 AXI Protocol Int…
Display Controller – LCD / OLED Panels (Avalon Bus)
The DB9000AVLN TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the Avalon Bus within Altera Qs…
General Purpose PLL for TSMC 180nm
The OT3122t180 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for …
5MHz-35MHz Crystal Oscillator - Austriamicrosystems 0.18µ
The OT0210bj is a flexible crystal oscillator for the Austriamicrosystems 0.18µ CMOS processes.
The OT3913t180 is low power, low frequency, multivibrator oscillator for the TSMC 0.18µ CMOS processes.
Low Dropout Linear Regulator
Highly configurable HW PQC acceleration with RISC-V processor for full CPU offload
configurable HW PQC acceleration with RISC-V processor for full CPU offload, configurable as Subsystem or RoT, with SCA and FIA p…
FlexGen Smart Network-on-Chip (NoC) IP
AI-enhanced automation for smarter SoC and chiplet designs.