Learn more about Protocol Bridge IP core
This paper discusses about the low power IP components from ARM can help one to realize the low power features in the SoC. It should be noted that this paper does not discuss about the low power concepts or design techniques. Rather, it focuses on the implementation approaches using ARM low power IP.
Understand the role of the UCIe D2D Adapter in enabling reliable, scalable, multi-protocol die-to-die communication for chiplet architectures.
Script/simulation approach speeds SoC verification
This whitepaper summarizes the limitations of traditional bus-based approaches, introduces the advantages of the generic concept of NoC, and provides specific data about Arteris’ NoC, the first commercial implementation of such architectures
Synthesizable verification IP speeds design cycle
Synthesizable Verification IP