SmartDV Technologies IP Cores

TileLink Assertion IP provides an smart way to verify the TileLink component of a SOC or an ASIC.

• Protocol Bridge

SPI (Serial Peripheral Interface) Assertion IP provides an efficient and smart way to verify the SPI designs quickly without a te…

• SPI / QSPI XSPI

SMBUS Assertion IP provides an efficient and smart way to verify the SMBUS designs quickly without a testbench.

• I2C / I3C

SDRAM Assertion IP provides an efficient and smart way to verify the SDRAM designs quickly without a testbench.

• Controller

PMBUS Assertion IP provides an efficient and smart way to verify the PMBUS designs quickly without a testbench.

• PMBus

OCP Assertion IP provides an efficient and smart way to verify the OCP designs quickly without a testbench.

• Protocol Bridge

AMBA LPI Assertion IP provides an efficient and smart way to verify the AMBA LPI designs quickly without a testbench.

• Protocol Bridge

LPDDR5X Assertion IP provides an efficient and smart way to verify the LPDDR5X designs quickly without a testbench.

• Controller
• LPDDR5X

LPDDR5 Assertion IP provides an efficient and smart way to verify the LPDDR5 designs quickly without a testbench.

• Controller
• LPDDR5

LPDDR4 Assertion IP provides an efficient and smart way to verify the LPDDR4 designs quickly without a testbench.

• Controller
• LPDDR4

LPDDR3 Assertion IP provides an efficient and smart way to verify the LPDDR3 designs quickly without a testbench.

• Controller

DFI LPDDR Assertion IP provides an smart way to verify the ARM DFI LPDDR component of a SOC or a ASIC.

• Controller

DFI HBM2E Assertion IP provides an efficient and smart way to verify the DFI HBM2E designs quickly without a testbench.

• Controller

DFI HBM Assertion IP provides an efficient and smart way to verify the DFI HBM designs quickly without a testbench.

• Controller

DFI GDDR6 Assertion IP provides an efficient and smart way to verify the DFI GDDR6 designs quickly without a testbench.

• Controller

DDR5 DFI Assertion IP provides an efficient and smart way to verify the DDR5 DFI designs quickly without a testbench.

• Controller
• DDR5

DDR4 DFI Assertion IP provides an efficient and smart way to verify the DFI DDR4 designs quickly without a testbench.

• Controller
• DDR4

DDR3 DFI Assertion IP provides an efficient and smart way to verify the DFI DDR3 designs quickly without a testbench.

• Controller
• DDR3

DDR2 DFI Assertion IP provides an efficient and smart way to verify the DDR2 DFI designs quickly without a testbench.

• Controller
• DDR2

DDR2 Assertion IP provides an efficient and smart way to verify the DDR2 designs quickly without a testbench.

• Controller
• DDR2