The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant …
- Root Of Trust
- In production
- Now
- FIPS 140-2 Compliant
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next-generation computing platforms, we make data faster and safer.
The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant …
Poly-IP-53 (EIP-53) is IP for accelerating the Poly1305 hash-based message authentication algorithm (RFC7539), supporting the NIS…
The LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile,…
Rambus’s AXI Interface Core is designed for use in applications requiring ARM’s eXtensible Interface (AXI).
HBM2/2E Memory Controller Core
The HBM2E memory controller IP is designed for use in applications requiring high memory throughput including performance-intensi…
The CRYPT-IP-120 combines local key storage, an AES cipher (AES-IP-39), a SHA-2 hash (HASH-IP-57) and DMA capability into an easy…
The ZUC-IP-48 (EIP-48) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as sp…
SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2…
The Kasumi-IP-06 (EIP-06) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as…
SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algor…
Rambus MIPI Testbench from Rambus emulates a MIPI device enabling end-to-end simulation of a MIPI design.
The MIPI DSI-2 controller core is optimized for high performance, low power and small size.
The MIPI CSI-2 controller core is optimized for high performance, low power and small size.
The Rambus Mem Test Analyzer Core from Rambus is used to capture the results from Rambus Memory Test Core.
The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including …
The AES-IP-37 (EIP-37) is IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394) up to 6 Gbps.
The AES-IP-36 (EIP-36) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting ECB, CBC and CTR modes up…
ARC4 Stream Cipher Accelerators
The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600M…
Standalone stateful hash-based signatures software library
The SHSlib is a standalone stateful hash-based signatures software library, which provides signature verification for stateful ha…
1G to 50G Single-Port MACsec Engine with xMII interface and TSN support
The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem.