Vendor: Rambus, Inc. Category: LPDDR

LPDDR4X / LPDDR4 Controller

The LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile,…

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Controller LPDDR4 View all specifications

Overview

The LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile, automotive, Internet of Things (IoT), laptop PCs, and edge networking devices.

How the LPDDR4X/4 Controller works

The LPDDR4 controller core accepts commands using a simple local interface and translates them to the command sequences required by LPDDR4 devices. The core also performs all initialization, refresh and power-down functions.

The core uses bank management modules to monitor the status of each LPDDR bank. Banks are only opened or closed when necessary, minimizing access delays.

The core queues up multiple commands in the command queue. This enables optimal bandwidth utilization for both short transfers to highly random address locations as well as longer transfers to contiguous address space. The command queue is also used to opportunistically perform look-ahead activates, precharges and auto-precharges further improving overall throughput.

The core is provided with run-time programmable inputs for all memory timing parameters and configuration settings. This ensures compatibility with all LPDDR4 configurations.

Add-On Cores such as a Multi-Port Front-End and Reorder Core can be optionally delivered with the core. The core can be delivered fully integrated and verified with the target LPDDR PHY.

Key features

  • Maximizes bus efficiency via look-ahead command processing, bank management, and auto-precharge
  • Latency minimized via parameterized pipelining
  • Achieves high clock rates with minimal routing constraints
  • Supports full-rate, half-rate and quarter-rate clock operation
  • Multi-mode controller support
  • Full run-time configurable timing parameters and memory settings
  • Supports LPDDR4 data bus inversion (DBI) and data mask (DM)
  • Supports self-refresh, partial array self-refresh, power down, and deep power down modes
  • DFI compatible
  • Full set of Add-on cores available
  • Can be fully integrated and verified with target LPDDR PHY
  • Minimal ASIC gate count

Block Diagram

LPDDR4X / LPDDR4 Controller block diagram

What’s Included?

  • Core (source code)
  • Testbench (source code)
  • Complete documentation
  • Expert technical support
  • Maintenance updates

Specifications

Identity

Part Number
LPDDR4X / LPDDR4 Controller
Vendor
Rambus, Inc.
Type
Silicon IP
Controller / PHY
Controller

Standards & Interfaces

Memory
LPDDR4

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Rambus, Inc.
HQ: USA
Contact Rambus, Inc.

Learn more about LPDDR IP core

Cryptography Does Not Equal Security

At Rambus, we often receive RFIs, RFPs and RFQs for security silicon IP cores to be used in our customer’s next semiconductor product. Such requests often contain a long shopping list of required cryptographic algorithms, their modes of operation, their key lengths or strengths and performance and sizing requirements.

Frequently asked questions about LPDDR Interface IP

What is LPDDR4X / LPDDR4 Controller?

LPDDR4X / LPDDR4 Controller is a LPDDR IP core from Rambus, Inc. listed on Semi IP Hub.

How should engineers evaluate this LPDDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LPDDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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