1 – 600 MHz frequency synthesizer
The synthesizer produces stable clock signal in range from 1 to 600MHz.
- TSMC
- 90nm
- CIS
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1 – 600 MHz frequency synthesizer
The synthesizer produces stable clock signal in range from 1 to 600MHz.
2-bit 2-channel 50 MSPS flash ADC
The circuit is 2-bit ADC with programmable threshold.
2-bit 2-channel 100 MSPS flash ADC
The circuit is 2-bit ADC with programmable threshold.
1.2 Gbps LVDS transmitter/receiver
The interface to the core logic in receiver mode includes the signal pins (out_p and out_n) to receive data and the control pins …
12-bit 2-channel up to 50 MSPS current steering DAC
180TSMC_DAC_07 is a 12-bit 50 MSPS dual current steering DAC contains two DAC cores, reference current, bandgap, configuration re…
12-bit 1-channel 20 to 100 MSPS ADC
The low-power high-speed 12-bit ADC employs a high-performance differential pipeline architecture.
12-bit 1-channel 4 MSPS SAR ADC
065TSMC_ADC_10 employs high-performance differential successive approximation architecture with sub-ranging and output offset com…
12-bit 4-channel 20 to 100 MSPS ADC
Quad-channel 12-bit 20 – 100 MSPS ADC contains four ADC channels, LVDS receiver, reference voltages and reference currents circui…
This device is designed to generate a quadrature heterodyne (oscillator) signal.
Temperature sensor consists of built-in 10-bit R-2R DAC, diode and own reference voltage former.
1.2 V Bandgap voltage reference
Bandgap voltage reference forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual…
1.22 V Reference voltage source
Reference voltage source forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual …
612.7 mV Reference voltage source
Reference voltage source forms temperature-compensated voltage level due to mutual compensation of temperature dependence of bipo…
1.19 V Reference voltage source
Reference voltage source forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual …
Phase-locked loop system 2.8 to 3.3 GHz
PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multip…
24.84 MHz phase-frequency detector with charge pump
The device consists of phase frequency detector (PFD), charge pump and lock detector (LD) PFD compares phases of a divided VCO si…
1 Gbps Rail to Rail LVDS receiver
065TSMC_LVDS_08 is LVDS receiver with rail to rail input range.
065TSMC_LVDS_07 is LVDS transmitter.
16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC
Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two …
The 10-bit 100 MSPS ADC employs a high-performance front-end sample-and-hold with differential multi-stage pipelined architecture…