EnSilica is a leading fabless design house focused on custom ASIC design and supply for OEMs and system houses, and IC design services for companies with their own design teams. The company has world-class expertise in supplying custom analog, mixed signal and digital IC’s to its international customers in the automotive, industrial, healthcare and consumer markets.
The company also offers a broad portfolio of core IP covering cryptography, Radar and communications systems. EnSilica has a track record in delivering high quality solutions to demanding industry standards.
Digital IIR filter with APB interface
A range of 5th to 11th order digital IIR filters for conditioning and optionally decimating data from an external source and to D…
The eSi-DDC is a Digital Down Converter combining a Digital Frequency Synthesizer (DDS) with a Digital Mixer.
Maximum normalised correlation core
The eSi-MNC core provides the control and data plane interfaces to a Maximum Normalised Correlation module.
This is a high throughput QAM constellation demapper and Log Likelihood Ratio (LLR) bit-metric generator.
Ultra Low-power, compact Hybrid Viterbi Decoder
This IP core is available with a configurable number of ACS units to suit a range of throughput requirements.
High-throughput Low-memory Viterbi Decoder
This IP core is available in either normal or high throughput configurations.
Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
eSi-PQC-HT is a post quantum ready Public Key Crypto HW acceleration library, optimized for networking applications.
Power and area optimised Bitcoin miner engine
The eSi-BTC core is a Bitcoin miner engine that perform double SHA256 Hash.
The eSi-SHA512 core is an easy to use SHA hash accelerator peripheral for both SHA512 and SHA384.
The eSi-DES block performs encryption and decryption of 64-bit words using the DES (Data Encryption Standard) and TDEA (Triple DE…
Digital FIR filter with APB interface
The eSi-FIR core provides an interface to filter and decimate time interleaved multi-channel data.
Elliptic Curve Digital Signature generation and verification
eSi-ECDSA is a hardware acceleration core for Elliptic Curve (EC) Digital Signature Algorithm modular arithmetic operations defin…
Attack resistant ECC hardware acceleration core
eSi-ECC is a hardware acceleration core for Elliptic Curve (EC) modular arithmetic operations, which are commonly performed withi…
This is a pipelined high throughput AES core capable of starting a new encryption every clock cycle.
RSA public key cryptography with APB interface
The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library.
Medium throughput, compact Reed Solomon decoder
This implementation of a M=8 Reed Solomon decoder has been designed to use a minimum set of resources whilst maintaining a medium…
High Throughput Reed Solomon Decoder
This is a Reed Solomon decoder capable of operating with shortened codewords.
High-performance Low-memory Mixed Radix FFT
This FFT is an efficient implementation of the Decimation in Frequency (DIF) Cooley-Tukey FFT.
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22.
APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer
The eSi-SWP MAC is an APB peripheral and implements the functionality of the ETSI TS 102 613 V7.9.0 (2011-03) MAC Layer.