Vendor: EnSilica Category: IEEE 802.15.4

APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer

The eSi-SWP MAC is an APB peripheral and implements the functionality of the ETSI TS 102 613 V7.9.0 (2011-03) MAC Layer.

Overview

The eSi-SWP MAC is an APB peripheral and implements the functionality of the ETSI TS 102 613 V7.9.0 (2011-03) MAC Layer.

Key features

The LLL (Logical Link Layer) of the SWP protocol will be implemented in software. The SWP
HW supports the following features:
- Independent transmit and receive FIFOs.
- Numerous interrupt flags to provide state information for implementation for full SWP
protocol in software.
- Optional CRC and bit stuffing functionality.
- NRZ-L data receiver for receiving data from the UICC.
- PWM bit coding for transmitting data to UICC.
- Fully synchronous design supporting asynchronous baud clock for transmit data.
- AMBA 3 APB slave interface.

Block Diagram

eSi-SWP MAC block diagram

Specifications

Identity

Part Number

eSi-SWP MAC

Vendor

EnSilica

Type

Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

EnSilica

HQ: UK

Frequently asked questions about IEEE 802.15.4 IP cores

What is APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer?

APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer is a IEEE 802.15.4 IP core from EnSilica listed on Semi IP Hub.

How should engineers evaluate this IEEE 802.15.4?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this IEEE 802.15.4 IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.