Vendor: EnSilica Category: Filters Transforms

High-performance Low-memory Mixed Radix FFT

This FFT is an efficient implementation of the Decimation in Frequency (DIF) Cooley-Tukey FFT.

Overview

This FFT is an efficient implementation of the Decimation in Frequency (DIF) Cooley-Tukey FFT. Using low FPGA/ASIC resources and a high clock speed, this design manages high throughput by careful design optimization. This results in an IP core well balanced between logic and throughput.

The FFT IP consists of two separate variants:
A complex valued IFFT/FFT.
A real valued IFFT/FFT.



The real valued FFT uses a half size transform and a combining pass to generate the full transform. This means that the core has only half the scratch memory and cycle count of the complex valued transform.

EnSilica has a comprehensive range of FFT IP cores, these cores can be configured to replace the AMD FFT LogiCORE™ IP or FFT Intel® FPGA IP Core when migrating an FPGA design to ASIC technology.

Key features

  • Real or Complex valued IFFT/FFT options
  • Per transform selection of FFT size from 8 to 32768 points
  • Per transform selection of FFT or IFFT
  • Efficient mixed radix 4/2 dragonfly for low cycle count
  • Block floating point scaling ensures excellent dynamic range
  • Data and twiddle bit widths are parameterized
  • IEEE-754 convergent rounding after twiddle multiplications
  • 1/8 twiddle table storage for lowest ROM requirements
  • Choice of interfacing options

Applications

  • OFDM system such as :
    • DVB/DAB
    • IEEE802.11a
    • IEEE802.11n
    • IEEE802.16

What’s Included?

  • RTL
  • Testbench
  • Synthesis scripts
  • Documentation
  • MATLAB and C++ bit exact model

Specifications

Identity

Part Number
eSi-FFT-MixedRadix
Vendor
EnSilica
Type
Silicon IP

Provider

EnSilica
HQ: UK

Learn more about Filters Transforms IP core

Why user-terminal silicon will shape LEO’s next phase

As Low Earth Orbit (LEO) satellite networks target mass-market broadband, mobility and enterprise services, the chipset inside the user terminal – not only the constellation in orbit –will determine the achievable cost, power consumption and production scale

EnSilica: Automotive Manufacturing and Supply Contract Win

EnSilica plc , a leading fabless microchip maker with a growing portfolio of reusable IP, serving the Space & Comms, Industrial, Automotive and Healthcare markets, is pleased to announce a new 7 year manufacturing and supply contract to produce an Arm based sensing chip for a German manufacturer of automotive components.

EnSilica selected for UK CHERI Adoption Collective

EnSilica is pleased to announce its participation in the newly formed CHERI Adoption Collective, launched by PA Consulting in collaboration with the Department for Science, Innovation & Technology (“DSIT”).

Frequently asked questions about Filters and Transforms IP cores

What is High-performance Low-memory Mixed Radix FFT?

High-performance Low-memory Mixed Radix FFT is a Filters Transforms IP core from EnSilica listed on Semi IP Hub.

How should engineers evaluate this Filters Transforms?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP